Lines Matching full:pericfg
139 pericfg: syscon@10003000 { label
140 compatible = "mediatek,mt2701-pericfg", "syscon";
249 clocks = <&pericfg CLK_PERI_AUXADC>;
260 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
270 clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
280 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
290 clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
302 clocks = <&pericfg CLK_PERI_I2C0>, <&pericfg CLK_PERI_AP_DMA>;
316 clocks = <&pericfg CLK_PERI_I2C1>, <&pericfg CLK_PERI_AP_DMA>;
330 clocks = <&pericfg CLK_PERI_I2C2>, <&pericfg CLK_PERI_AP_DMA>;
345 <&pericfg CLK_PERI_SPI0>;
355 clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
357 resets = <&pericfg MT2701_PERI_THERM_SW_RST>;
367 clocks = <&pericfg CLK_PERI_NFI>,
368 <&pericfg CLK_PERI_NFI_PAD>;
380 clocks = <&pericfg CLK_PERI_NFI_ECC>;
389 clocks = <&pericfg CLK_PERI_FLASH>,
405 <&pericfg CLK_PERI_SPI1>;
418 <&pericfg CLK_PERI_SPI2>;
695 clocks = <&pericfg CLK_PERI_USB0>,
696 <&pericfg CLK_PERI_USB0_MCU>,
697 <&pericfg CLK_PERI_USB_SLV>;