Lines Matching +full:pmu +full:- +full:syscon
1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a7";
27 compatible = "arm,armv7-timer";
38 * u-boot is broken
40 clock-frequency = <6000000>;
43 pmu: pmu { label
44 compatible = "arm,cortex-a7-pmu";
46 interrupt-affinity = <&cpu0>;
50 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
57 gic: interrupt-controller@16001000 {
58 compatible = "arm,cortex-a7-gic";
63 #interrupt-cells = <3>;
64 interrupt-controller;
70 compatible = "simple-bus";
72 #address-cells = <1>;
73 #size-cells = <1>;
76 pmsleep: syscon@1c00 {
77 compatible = "mstar,msc313-pmsleep", "syscon";
82 compatible = "syscon-reboot";
88 intc_fiq: interrupt-controller@201310 {
89 compatible = "mstar,mst-intc";
91 #interrupt-cells = <3>;
92 interrupt-controller;
93 interrupt-parent = <&gic>;
94 mstar,irqs-map-range = <96 127>;
97 intc_irq: interrupt-controller@201350 {
98 compatible = "mstar,mst-intc";
100 #interrupt-cells = <3>;
101 interrupt-controller;
102 interrupt-parent = <&gic>;
103 mstar,irqs-map-range = <32 95>;
104 mstar,intc-no-eoi;
115 reg-shift = <3>;
116 interrupts-extended = <&intc_irq GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
117 clock-frequency = <172000000>;
123 compatible = "mmio-sram";