Lines Matching +full:0 +full:xd4011000
32 marvell,tauros2-cache-features = <0x3>;
39 reg = <0xd4200000 0x00200000>;
44 reg = <0xd420d000 0x4000>;
57 reg = <0xd4282000 0x1000>;
66 reg = <0x150 0x4>, <0x168 0x4>;
76 reg = <0x154 0x4>, <0x16c 0x4>;
87 reg = <0x180 0x4>, <0x17c 0x4>;
97 reg = <0x158 0x4>, <0x170 0x4>;
107 reg = <0x15c 0x4>, <0x174 0x4>;
117 reg = <0x160 0x4>, <0x178 0x4>;
127 reg = <0x188 0x4>, <0x184 0x4>;
134 reg = <0xd4207000 0x40>;
135 #phy-cells = <0>;
141 reg = <0xd4208000 0x200>;
152 reg = <0xd4280000 0x120>;
161 reg = <0xd4280800 0x120>;
170 reg = <0xd4281000 0x120>;
179 reg = <0xd4281800 0x120>;
188 reg = <0xd420a000 0x800>;
192 #clock-cells = <0>;
199 reg = <0xd420a800 0x800>;
203 #clock-cells = <0>;
210 reg = <0xd42a0800 0x100>;
220 reg = <0xd42a0900 0x100>;
228 reg = <0xd42a0c30 0x10>;
241 reg = <0xd42a0c00 0x30>,
242 <0xd42a0c80 0x30>;
248 #sound-dai-cells = <0>;
254 reg = <0xd42a0d00 0x30>,
255 <0xd42a0d80 0x30>;
261 #sound-dai-cells = <0>;
270 reg = <0xd4000000 0x00200000>;
275 reg = <0xd4000000 0x10000>;
283 reg = <0xd4014000 0x100>;
290 reg = <0xd4030000 0x1000>;
300 reg = <0xd4017000 0x1000>;
310 reg = <0xd4018000 0x1000>;
320 reg = <0xd4016000 0x1000>;
332 reg = <0xd4019000 0x1000>;
344 reg = <0xd4019000 0x4>;
348 reg = <0xd4019004 0x4>;
352 reg = <0xd4019008 0x4>;
356 reg = <0xd4019100 0x4>;
360 reg = <0xd4019104 0x4>;
364 reg = <0xd4019108 0x4>;
370 reg = <0xd4011000 0x1000>;
375 #size-cells = <0>;
382 reg = <0xd4031000 0x1000>;
384 interrupts = <0>;
388 #size-cells = <0>;
394 reg = <0xd4032000 0x1000>;
400 #size-cells = <0>;
406 reg = <0xd4033000 0x1000>;
412 #size-cells = <0>;
419 reg = <0xd4033800 0x1000>;
425 #size-cells = <0>;
431 reg = <0xd4034000 0x1000>;
437 #size-cells = <0>;
443 reg = <0xd4010000 0x1000>;
444 interrupts = <1>, <0>;
454 reg = <0xd4035000 0x1000>;
456 interrupts = <0>;
458 #size-cells = <0>;
464 reg = <0xd4036000 0x1000>;
468 #size-cells = <0>;
474 reg = <0xd4037000 0x1000>;
478 #size-cells = <0>;
484 reg = <0xd4039000 0x1000>;
488 #size-cells = <0>;
495 reg = <0xe0000000 0x10000>;
496 ranges = <0 0xe0000000 0x10000>;
504 reg = <0xd4050000 0x2000>,
505 <0xd4282800 0x400>,
506 <0xd4015000 0x1000>;