Lines Matching +full:cortex +full:- +full:a8
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
9 #include <dt-bindings/gpio/meson8b-gpio.h>
10 #include <dt-bindings/power/meson8-power.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a5";
23 next-level-cache = <&L2>;
25 enable-method = "amlogic,meson8b-smp";
27 operating-points-v2 = <&cpu_opp_table>;
33 compatible = "arm,cortex-a5";
34 next-level-cache = <&L2>;
36 enable-method = "amlogic,meson8b-smp";
38 operating-points-v2 = <&cpu_opp_table>;
44 compatible = "arm,cortex-a5";
45 next-level-cache = <&L2>;
47 enable-method = "amlogic,meson8b-smp";
49 operating-points-v2 = <&cpu_opp_table>;
55 compatible = "arm,cortex-a5";
56 next-level-cache = <&L2>;
58 enable-method = "amlogic,meson8b-smp";
60 operating-points-v2 = <&cpu_opp_table>;
65 cpu_opp_table: opp-table {
66 compatible = "operating-points-v2";
67 opp-shared;
69 opp-96000000 {
70 opp-hz = /bits/ 64 <96000000>;
71 opp-microvolt = <860000>;
73 opp-192000000 {
74 opp-hz = /bits/ 64 <192000000>;
75 opp-microvolt = <860000>;
77 opp-312000000 {
78 opp-hz = /bits/ 64 <312000000>;
79 opp-microvolt = <860000>;
81 opp-408000000 {
82 opp-hz = /bits/ 64 <408000000>;
83 opp-microvolt = <860000>;
85 opp-504000000 {
86 opp-hz = /bits/ 64 <504000000>;
87 opp-microvolt = <860000>;
89 opp-600000000 {
90 opp-hz = /bits/ 64 <600000000>;
91 opp-microvolt = <860000>;
93 opp-720000000 {
94 opp-hz = /bits/ 64 <720000000>;
95 opp-microvolt = <860000>;
97 opp-816000000 {
98 opp-hz = /bits/ 64 <816000000>;
99 opp-microvolt = <900000>;
101 opp-1008000000 {
102 opp-hz = /bits/ 64 <1008000000>;
103 opp-microvolt = <1140000>;
105 opp-1200000000 {
106 opp-hz = /bits/ 64 <1200000000>;
107 opp-microvolt = <1140000>;
109 opp-1320000000 {
110 opp-hz = /bits/ 64 <1320000000>;
111 opp-microvolt = <1140000>;
113 opp-1488000000 {
114 opp-hz = /bits/ 64 <1488000000>;
115 opp-microvolt = <1140000>;
117 opp-1536000000 {
118 opp-hz = /bits/ 64 <1536000000>;
119 opp-microvolt = <1140000>;
123 gpu_opp_table: gpu-opp-table {
124 compatible = "operating-points-v2";
126 opp-255000000 {
127 opp-hz = /bits/ 64 <255000000>;
128 opp-microvolt = <1100000>;
130 opp-364285714 {
131 opp-hz = /bits/ 64 <364285714>;
132 opp-microvolt = <1100000>;
134 opp-425000000 {
135 opp-hz = /bits/ 64 <425000000>;
136 opp-microvolt = <1100000>;
138 opp-510000000 {
139 opp-hz = /bits/ 64 <510000000>;
140 opp-microvolt = <1100000>;
142 opp-637500000 {
143 opp-hz = /bits/ 64 <637500000>;
144 opp-microvolt = <1100000>;
145 turbo-mode;
150 compatible = "arm,cortex-a5-pmu";
155 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
158 reserved-memory {
159 #address-cells = <1>;
160 #size-cells = <1>;
166 no-map;
171 compatible = "simple-bus";
173 #address-cells = <1>;
174 #size-cells = <1>;
177 ddr_clkc: clock-controller@400 {
178 compatible = "amlogic,meson8b-ddr-clkc";
181 clock-names = "xtal";
182 #clock-cells = <1>;
186 compatible = "simple-bus";
188 #address-cells = <1>;
189 #size-cells = <1>;
192 canvas: video-lut@48 {
193 compatible = "amlogic,meson8b-canvas",
201 compatible = "simple-bus";
203 #address-cells = <1>;
204 #size-cells = <1>;
208 compatible = "amlogic,meson8b-mali", "arm,mali-450";
218 interrupt-names = "gp", "gpmmu", "pp", "pmu",
222 clock-names = "bus", "core";
223 operating-points-v2 = <&gpu_opp_table>;
230 compatible = "amlogic,meson8b-pmu", "syscon";
235 compatible = "amlogic,meson8b-aobus-pinctrl";
237 #address-cells = <1>;
238 #size-cells = <1>;
241 gpio_ao: ao-bank@14 {
245 reg-names = "mux", "pull", "gpio";
246 gpio-controller;
247 #gpio-cells = <2>;
248 gpio-ranges = <&pinctrl_aobus 0 0 16>;
255 bias-disable;
263 bias-disable;
270 reset: reset-controller@4404 {
271 compatible = "amlogic,meson8b-reset";
273 #reset-cells = <1>;
276 analog_top: analog-top@81a8 {
277 compatible = "amlogic,meson8b-analog-top", "syscon";
282 compatible = "amlogic,meson8b-pwm";
284 #pwm-cells = <3>;
288 clock-measure@8758 {
289 compatible = "amlogic,meson8b-clk-measure";
294 compatible = "amlogic,meson8b-cbus-pinctrl";
296 #address-cells = <1>;
297 #size-cells = <1>;
305 reg-names = "mux", "pull", "pull-enable", "gpio";
306 gpio-controller;
307 #gpio-cells = <2>;
308 gpio-ranges = <&pinctrl_cbus 0 0 83>;
311 eth_rgmii_pins: eth-rgmii {
329 bias-disable;
333 eth_rmii_pins: eth-rmii {
345 bias-disable;
349 i2c_a_pins: i2c-a {
353 bias-disable;
357 sd_b_pins: sd-b {
362 bias-disable;
366 sdxc_c_pins: sdxc-c {
372 bias-pull-up;
376 pwm_c1_pins: pwm-c1 {
380 bias-disable;
384 pwm_d_pins: pwm-d {
388 bias-disable;
392 uart_b0_pins: uart-b0 {
397 bias-disable;
401 uart_b0_cts_rts_pins: uart-b0-cts-rts {
406 bias-disable;
413 smp-sram@1ff80 {
414 compatible = "amlogic,meson8b-smp-sram";
421 compatible = "amlogic,meson8b-efuse";
423 clock-names = "core";
432 compatible = "amlogic,meson8b-dwmac", "snps,dwmac-3.70a", "snps,dwmac";
441 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
442 rx-fifo-depth = <4096>;
443 tx-fifo-depth = <2048>;
446 reset-names = "stmmaceth";
448 power-domains = <&pwrc PWRC_MESON8_ETHERNET_MEM_ID>;
452 compatible = "amlogic,meson-gpio-intc",
453 "amlogic,meson8b-gpio-intc";
458 clkc: clock-controller {
459 compatible = "amlogic,meson8b-clkc";
461 clock-names = "xtal", "ddr_pll";
462 #clock-cells = <1>;
463 #reset-cells = <1>;
466 pwrc: power-controller {
467 compatible = "amlogic,meson8b-pwrc";
468 #power-domain-cells = <1>;
469 amlogic,ao-sysctrl = <&pmu>;
481 reset-names = "dblk", "pic_dc", "hdmi_apb", "hdmi_system",
485 clock-names = "vpu";
486 assigned-clocks = <&clkc CLKID_VPU>;
487 assigned-clock-rates = <182142857>;
492 compatible = "amlogic,meson8b-rng", "amlogic,meson-rng";
494 clock-names = "core";
510 arm,data-latency = <3 3 3>;
511 arm,tag-latency = <2 2 2>;
512 arm,filter-ranges = <0x100000 0xc0000000>;
513 prefetch-data = <1>;
514 prefetch-instr = <1>;
515 arm,shared-override;
520 compatible = "arm,cortex-a5-scu";
525 compatible = "arm,cortex-a5-global-timer";
538 compatible = "arm,cortex-a5-twd-timer";
546 compatible = "amlogic,meson8b-pwm";
550 compatible = "amlogic,meson8b-pwm";
554 compatible = "amlogic,meson8b-rtc";
559 compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
561 clock-names = "clkin", "core";
562 amlogic,hhi-sysctrl = <&hhi>;
563 nvmem-cells = <&temperature_calib>;
564 nvmem-cell-names = "temperature_calib";
568 compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc";
574 clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk";
578 compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio";
580 clock-names = "core", "clkin";
585 clock-names = "xtal", "pclk";
589 compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
591 clock-names = "baud", "xtal", "pclk";
595 compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
597 clock-names = "baud", "xtal", "pclk";
601 compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
603 clock-names = "baud", "xtal", "pclk";
607 compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
609 clock-names = "baud", "xtal", "pclk";
613 compatible = "amlogic,meson8b-usb", "snps,dwc2";
615 clock-names = "otg";
619 compatible = "amlogic,meson8b-usb", "snps,dwc2";
621 clock-names = "otg";
625 compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy";
627 clock-names = "usb_general", "usb";
632 compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy";
634 clock-names = "usb_general", "usb";
639 compatible = "amlogic,meson8b-wdt";