Lines Matching +full:0 +full:x84c0
22 reg = <0xc1100000 0x200000>;
25 ranges = <0x0 0xc1100000 0x200000>;
31 reg = <0x4000 0x400>;
36 reg = <0x7c00 0x200>;
41 reg = <0x8100 0x8>;
46 reg = <0x84c0 0x18>;
53 reg = <0x84dc 0x18>;
60 reg = <0x8500 0x20>;
63 #size-cells = <0>;
69 reg = <0x8550 0x10>;
76 reg = <0x8650 0x10>;
83 reg = <0x8680 0x34>;
91 reg = <0x8700 0x18>;
98 reg = <0x87c0 0x20>;
101 #size-cells = <0>;
107 #phy-cells = <0>;
108 reg = <0x8800 0x20>;
114 #phy-cells = <0>;
115 reg = <0x8820 0x20>;
121 reg = <0x8c20 0x20>;
124 #size-cells = <0>;
130 reg = <0x8c80 0x80>;
132 #size-cells = <0>;
138 reg = <0x8e00 0x42>;
145 reg = <0x9880 0x10>;
154 reg = <0x9900 0x8>;
155 interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
160 reg = <0x9940 0x18>;
170 reg = <0xc4200000 0x1000>;
177 reg = <0xc4300000 0x10000>;
180 ranges = <0x0 0xc4300000 0x10000>;
184 reg = <0x1000 0x1000>,
185 <0x100 0x100>;
193 reg = <0xc8100000 0x100000>;
196 ranges = <0x0 0xc8100000 0x100000>;
200 reg = <0x480 0x20>;
207 reg = <0x4c0 0x18>;
214 reg = <0x500 0x20>;
217 #size-cells = <0>;
223 reg = <0x740 0x14>;
234 #size-cells = <0>;
235 reg = <0xc9040000 0x40000>;
249 #size-cells = <0>;
250 reg = <0xc90c0000 0x40000>;
260 reg = <0xc9410000 0x10000
261 0xc1108108 0x4>;
269 reg = <0xd9000000 0x20000>;
272 ranges = <0 0xd9000000 0x20000>;
277 reg = <0xd9040000 0x10000>;
282 reg = <0xda000000 0x6000>;
285 ranges = <0x0 0xda000000 0x6000>;
287 efuse: nvmem@0 {
289 reg = <0x0 0x2000>;
300 #clock-cells = <0>;