Lines Matching +full:mv64xxx +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "marvell,kirkwood-pcie";
9 #address-cells = <3>;
10 #size-cells = <2>;
12 bus-range = <0x00 0xff>;
25 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
27 #address-cells = <3>;
28 #size-cells = <2>;
29 #interrupt-cells = <1>;
32 bus-range = <0x00 0xff>;
33 interrupt-map-mask = <0 0 0 0>;
34 interrupt-map = <0 0 0 0 &intc 9>;
35 marvell,pcie-port = <0>;
36 marvell,pcie-lane = <0>;
43 assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
45 #address-cells = <3>;
46 #size-cells = <2>;
47 #interrupt-cells = <1>;
50 bus-range = <0x00 0xff>;
51 interrupt-map-mask = <0 0 0 0>;
52 interrupt-map = <0 0 0 0 &intc 10>;
53 marvell,pcie-port = <1>;
54 marvell,pcie-lane = <0>;
62 pinctrl: pin-controller@10000 {
63 compatible = "marvell,88f6282-pinctrl";
65 pmx_sata0: pmx-sata0 {
69 pmx_sata1: pmx-sata1 {
78 pmx_twsi1: pmx-twsi1 {
83 pmx_sdio: pmx-sdio {
91 compatible = "marvell,kirkwood-thermal";
97 compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
103 i2c1: i2c@11100 {
104 compatible = "marvell,mv64xxx-i2c";
106 #address-cells = <1>;
107 #size-cells = <0>;
109 clock-frequency = <100000>;
111 pinctrl-0 = <&pmx_twsi1>;
112 pinctrl-names = "default";
117 compatible = "marvell,orion-sata";
121 clock-names = "0", "1";
123 phy-names = "port0", "port1";
128 compatible = "marvell,orion-sdio";
132 pinctrl-0 = <&pmx_sdio>;
133 pinctrl-names = "default";
134 bus-width = <4>;
135 cap-sdio-irq;
136 cap-sd-highspeed;
137 cap-mmc-highspeed;