Lines Matching +full:0 +full:x1d000000
19 #size-cells = <0>;
21 cpu@0 {
30 reg = <0>;
35 operating-points = <50000 0
36 48000 0>;
51 #clock-cells = <0>;
58 #clock-cells = <0>;
67 #clock-cells = <0>;
74 #clock-cells = <0>;
80 pclk: pclk@0 {
81 #clock-cells = <0>;
83 clock-frequency = <0>;
89 #clock-cells = <0>;
97 #clock-cells = <0>;
98 lock-offset = <0x14>;
99 vco-offset = <0x08>;
106 #clock-cells = <0>;
107 lock-offset = <0x14>;
108 vco-offset = <0x08>;
115 #clock-cells = <0>;
116 lock-offset = <0x14>;
117 vco-offset = <0x1c>;
123 #clock-cells = <0>;
132 #clock-cells = <0>;
142 reg = <0xcb000000 0x100>;
164 valid-mask = <0x1fc003ff>;
171 reg = <0x10000040 0x100>;
172 clear-mask = <0xffffffff>;
173 valid-mask = <0x00000007>;
183 reg = <0xca000000 0x100>;
184 clear-mask = <0x00000fff>;
185 valid-mask = <0x00000fff>;
190 reg = <0xc8000000 0x10>;
198 #size-cells = <0>;
202 #size-cells = <0>;
204 port@0 {
205 reg = <0>;
273 reg = <0x1c000000 0x1000>;
282 reg = <0x1d000000 0x1000>;
290 reg = <0xC0000000 0x1000>;
311 port@0 {
314 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;