Lines Matching +full:dtr +full:- +full:gpios
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
15 compatible = "pwm-backlight";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_gpio_bl_on>;
18 enable-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
22 reg_module_3v3: regulator-module-3v3 {
23 compatible = "regulator-fixed";
24 regulator-always-on;
25 regulator-name = "+V3.3";
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
30 reg_module_3v3_avdd: regulator-module-3v3-avdd {
31 compatible = "regulator-fixed";
32 regulator-always-on;
33 regulator-name = "+V3.3_AVDD_AUDIO";
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
38 reg_sd1_vmmc: regulator-sd1-vmmc {
39 compatible = "regulator-gpio";
41 pinctrl-names = "default";
42 pinctrl-0 = <&pinctrl_snvs_reg_sd>;
43 regulator-always-on;
44 regulator-name = "+V3.3_1.8_SD";
45 regulator-min-microvolt = <1800000>;
46 regulator-max-microvolt = <3300000>;
48 vin-supply = <®_module_3v3>;
53 num-channels = <10>;
54 vref-supply = <®_module_3v3_avdd>;
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_flexcan1>;
64 pinctrl-names = "default";
65 pinctrl-0 = <&pinctrl_flexcan2>;
71 cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
72 pinctrl-names = "default";
73 pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
77 pinctrl-names = "default", "sleep";
78 pinctrl-0 = <&pinctrl_enet2>;
79 pinctrl-1 = <&pinctrl_enet2_sleep>;
80 phy-mode = "rmii";
81 phy-handle = <ðphy1>;
85 #address-cells = <1>;
86 #size-cells = <0>;
88 ethphy1: ethernet-phy@2 {
89 compatible = "ethernet-phy-ieee802.3-c22";
90 max-speed = <100>;
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_gpmi_nand>;
99 nand-on-flash-bbt;
100 nand-ecc-mode = "hw";
101 nand-ecc-strength = <8>;
102 nand-ecc-step-size = <512>;
107 pinctrl-names = "default", "gpio";
108 pinctrl-0 = <&pinctrl_i2c1>;
109 pinctrl-1 = <&pinctrl_i2c1_gpio>;
110 sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
111 scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
115 pinctrl-names = "default", "gpio";
116 pinctrl-0 = <&pinctrl_i2c2>;
117 pinctrl-1 = <&pinctrl_i2c2_gpio>;
118 sda-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
119 scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
123 compatible = "adi,ad7879-1";
124 pinctrl-names = "default";
125 pinctrl-0 = <&pinctrl_snvs_ad7879_int>;
127 interrupt-parent = <&gpio5>;
129 touchscreen-max-pressure = <4096>;
130 adi,resistance-plate-x = <120>;
131 adi,first-conversion-delay = /bits/ 8 <3>;
132 adi,acquisition-time = /bits/ 8 <1>;
133 adi,median-filter-size = /bits/ 8 <2>;
135 adi,conversion-interval = /bits/ 8 <255>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_lcdif_dat
146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_pwm4>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_pwm5>;
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_pwm6>;
161 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_pwm7>;
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
176 uart-has-rtscts;
177 fsl,dte-mode;
181 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_uart2>;
183 uart-has-rtscts;
184 fsl,dte-mode;
188 pinctrl-names = "default";
189 pinctrl-0 = <&pinctrl_uart5>;
190 fsl,dte-mode;
195 srp-disable;
196 hnp-disable;
197 adp-disable;
205 assigned-clocks = <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDHC1>;
206 assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
207 assigned-clock-rates = <0>, <198000000>;
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_wdog>;
213 fsl,ext-reset-output;
217 pinctrl_can_int: canint-grp {
223 pinctrl_enet2: enet2-grp {
253 pinctrl_ecspi1_cs: ecspi1-cs-grp {
259 pinctrl_ecspi1: ecspi1-grp {
267 pinctrl_flexcan1: flexcan1-grp {
274 pinctrl_flexcan2: flexcan2-grp {
281 pinctrl_gpio_bl_on: gpio-bl-on-grp {
287 pinctrl_gpio1: gpio1-grp {
300 pinctrl_gpio2: gpio2-grp { /* Camera */
310 pinctrl_gpio3: gpio3-grp { /* CAN2 */
317 pinctrl_gpio4: gpio4-grp {
323 pinctrl_gpio5: gpio5-grp { /* ATMEL MXT TOUCH */
329 pinctrl_gpio6: gpio6-grp { /* Wifi pins */
341 pinctrl_gpio7: gpio7-grp { /* CAN1 */
348 pinctrl_gpmi_nand: gpmi-nand-grp {
367 pinctrl_i2c1: i2c1-grp {
374 pinctrl_i2c1_gpio: i2c1-gpio-grp {
381 pinctrl_i2c2: i2c2-grp {
388 pinctrl_i2c2_gpio: i2c2-gpio-grp {
395 pinctrl_lcdif_dat: lcdif-dat-grp {
418 pinctrl_lcdif_ctrl: lcdif-ctrl-grp {
427 pinctrl_pwm4: pwm4-grp {
433 pinctrl_pwm5: pwm5-grp {
439 pinctrl_pwm6: pwm6-grp {
445 pinctrl_pwm7: pwm7-grp {
451 pinctrl_uart1: uart1-grp {
460 pinctrl_uart1_ctrl1: uart1-ctrl1-grp { /* Additional DTR, DCD */
469 pinctrl_uart2: uart2-grp {
477 pinctrl_uart5: uart5-grp {
484 pinctrl_usbh_reg: gpio-usbh-reg {
490 pinctrl_usdhc1: usdhc1-grp {
501 pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp {
512 pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {
523 pinctrl_usdhc2: usdhc2-grp {
536 pinctrl_wdog: wdog-grp {
544 pinctrl_snvs_gpio1: snvs-gpio1-grp {
554 pinctrl_snvs_gpio2: snvs-gpio2-grp { /* ATMEL MXT TOUCH */
560 pinctrl_snvs_gpio3: snvs-gpio3-grp { /* Wifi pins */
566 pinctrl_snvs_ad7879_int: snvs-ad7879-int-grp { /* TOUCH Interrupt */
572 pinctrl_snvs_reg_sd: snvs-reg-sd-grp {
578 pinctrl_snvs_usbc_det: snvs-usbc-det-grp {
584 pinctrl_snvs_gpiokeys: snvs-gpiokeys-grp {
590 pinctrl_snvs_usdhc1_cd: snvs-usdhc1-cd-grp {
596 pinctrl_snvs_usdhc1_sleep_cd: snvs-usdhc1-cd-grp-slp {
602 pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp {