Lines Matching +full:vf610 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
55 #address-cells = <1>;
56 #size-cells = <0>;
59 compatible = "arm,cortex-a7";
62 clock-frequency = <696000000>;
63 clock-latency = <61036>; /* two CLK32 periods */
64 #cooling-cells = <2>;
65 operating-points = <
72 fsl,soc-operating-points = <
86 clock-names = "arm", "pll2_bus", "pll2_pfd2_396m",
89 arm-supply = <®_arm>;
90 soc-supply = <®_soc>;
91 nvmem-cells = <&cpu_speed_grade>;
92 nvmem-cell-names = "speed_grade";
97 compatible = "arm,armv7-timer";
102 interrupt-parent = <&intc>;
106 ckil: clock-cli {
107 compatible = "fixed-clock";
108 #clock-cells = <0>;
109 clock-frequency = <32768>;
110 clock-output-names = "ckil";
113 osc: clock-osc {
114 compatible = "fixed-clock";
115 #clock-cells = <0>;
116 clock-frequency = <24000000>;
117 clock-output-names = "osc";
120 ipp_di0: clock-di0 {
121 compatible = "fixed-clock";
122 #clock-cells = <0>;
123 clock-frequency = <0>;
124 clock-output-names = "ipp_di0";
127 ipp_di1: clock-di1 {
128 compatible = "fixed-clock";
129 #clock-cells = <0>;
130 clock-frequency = <0>;
131 clock-output-names = "ipp_di1";
135 compatible = "arm,cortex-a7-pmu";
136 interrupt-parent = <&gpc>;
141 #address-cells = <1>;
142 #size-cells = <1>;
143 compatible = "simple-bus";
144 interrupt-parent = <&gpc>;
148 compatible = "mmio-sram";
152 intc: interrupt-controller@a01000 {
153 compatible = "arm,gic-400", "arm,cortex-a7-gic";
155 #interrupt-cells = <3>;
156 interrupt-controller;
157 interrupt-parent = <&intc>;
164 dma_apbh: dma-apbh@1804000 {
165 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
171 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
172 #dma-cells = <1>;
173 dma-channels = <4>;
177 gpmi: nand-controller@1806000 {
178 compatible = "fsl,imx6q-gpmi-nand";
179 #address-cells = <1>;
180 #size-cells = <1>;
182 reg-names = "gpmi-nand", "bch";
184 interrupt-names = "bch";
190 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
193 dma-names = "rx-tx";
198 compatible = "fsl,aips-bus", "simple-bus";
199 #address-cells = <1>;
200 #size-cells = <1>;
204 spba-bus@2000000 {
205 compatible = "fsl,spba-bus", "simple-bus";
206 #address-cells = <1>;
207 #size-cells = <1>;
212 #address-cells = <1>;
213 #size-cells = <0>;
214 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
219 clock-names = "ipg", "per";
221 dma-names = "rx", "tx";
226 #address-cells = <1>;
227 #size-cells = <0>;
228 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
233 clock-names = "ipg", "per";
235 dma-names = "rx", "tx";
240 #address-cells = <1>;
241 #size-cells = <0>;
242 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
247 clock-names = "ipg", "per";
249 dma-names = "rx", "tx";
254 #address-cells = <1>;
255 #size-cells = <0>;
256 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
261 clock-names = "ipg", "per";
263 dma-names = "rx", "tx";
268 compatible = "fsl,imx6ul-uart",
269 "fsl,imx6q-uart";
274 clock-names = "ipg", "per";
279 compatible = "fsl,imx6ul-uart",
280 "fsl,imx6q-uart";
285 clock-names = "ipg", "per";
290 compatible = "fsl,imx6ul-uart",
291 "fsl,imx6q-uart";
296 clock-names = "ipg", "per";
301 #sound-dai-cells = <0>;
302 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
308 clock-names = "bus", "mclk1", "mclk2", "mclk3";
311 dma-names = "rx", "tx";
316 #sound-dai-cells = <0>;
317 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
323 clock-names = "bus", "mclk1", "mclk2", "mclk3";
326 dma-names = "rx", "tx";
331 #sound-dai-cells = <0>;
332 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
338 clock-names = "bus", "mclk1", "mclk2", "mclk3";
341 dma-names = "rx", "tx";
346 compatible = "fsl,imx6ul-asrc", "fsl,imx53-asrc";
356 clock-names = "mem", "ipg", "asrck_0",
363 dma-names = "rxa", "rxb", "rxc",
365 fsl,asrc-rate = <48000>;
366 fsl,asrc-width = <16>;
372 compatible = "fsl,imx6ul-tsc";
378 clock-names = "tsc", "adc";
383 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
388 clock-names = "ipg", "per";
389 #pwm-cells = <3>;
394 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
399 clock-names = "ipg", "per";
400 #pwm-cells = <3>;
405 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
410 clock-names = "ipg", "per";
411 #pwm-cells = <3>;
416 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
421 clock-names = "ipg", "per";
422 #pwm-cells = <3>;
427 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
432 clock-names = "ipg", "per";
433 fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
438 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
443 clock-names = "ipg", "per";
444 fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
449 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
454 clock-names = "ipg", "per";
458 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
463 gpio-controller;
464 #gpio-cells = <2>;
465 interrupt-controller;
466 #interrupt-cells = <2>;
467 gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
472 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
477 gpio-controller;
478 #gpio-cells = <2>;
479 interrupt-controller;
480 #interrupt-cells = <2>;
481 gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>;
485 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
490 gpio-controller;
491 #gpio-cells = <2>;
492 interrupt-controller;
493 #interrupt-cells = <2>;
494 gpio-ranges = <&iomuxc 0 65 29>;
498 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
503 gpio-controller;
504 #gpio-cells = <2>;
505 interrupt-controller;
506 #interrupt-cells = <2>;
507 gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
511 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
516 gpio-controller;
517 #gpio-cells = <2>;
518 interrupt-controller;
519 #interrupt-cells = <2>;
520 gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>;
524 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
526 interrupt-names = "int0", "pps";
534 clock-names = "ipg", "ahb", "ptp",
536 fsl,num-tx-queues = <1>;
537 fsl,num-rx-queues = <1>;
538 fsl,stop-mode = <&gpr 0x10 4>;
543 compatible = "fsl,imx6ul-kpp", "fsl,imx6q-kpp", "fsl,imx21-kpp";
551 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
558 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
565 clks: clock-controller@20c4000 {
566 compatible = "fsl,imx6ul-ccm";
570 #clock-cells = <1>;
572 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
576 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
577 "syscon", "simple-mfd";
583 reg_3p0: regulator-3p0 {
584 compatible = "fsl,anatop-regulator";
585 regulator-name = "vdd3p0";
586 regulator-min-microvolt = <2625000>;
587 regulator-max-microvolt = <3400000>;
588 anatop-reg-offset = <0x120>;
589 anatop-vol-bit-shift = <8>;
590 anatop-vol-bit-width = <5>;
591 anatop-min-bit-val = <0>;
592 anatop-min-voltage = <2625000>;
593 anatop-max-voltage = <3400000>;
594 anatop-enable-bit = <0>;
597 reg_arm: regulator-vddcore {
598 compatible = "fsl,anatop-regulator";
599 regulator-name = "cpu";
600 regulator-min-microvolt = <725000>;
601 regulator-max-microvolt = <1450000>;
602 regulator-always-on;
603 anatop-reg-offset = <0x140>;
604 anatop-vol-bit-shift = <0>;
605 anatop-vol-bit-width = <5>;
606 anatop-delay-reg-offset = <0x170>;
607 anatop-delay-bit-shift = <24>;
608 anatop-delay-bit-width = <2>;
609 anatop-min-bit-val = <1>;
610 anatop-min-voltage = <725000>;
611 anatop-max-voltage = <1450000>;
614 reg_soc: regulator-vddsoc {
615 compatible = "fsl,anatop-regulator";
616 regulator-name = "vddsoc";
617 regulator-min-microvolt = <725000>;
618 regulator-max-microvolt = <1450000>;
619 regulator-always-on;
620 anatop-reg-offset = <0x140>;
621 anatop-vol-bit-shift = <18>;
622 anatop-vol-bit-width = <5>;
623 anatop-delay-reg-offset = <0x170>;
624 anatop-delay-bit-shift = <28>;
625 anatop-delay-bit-width = <2>;
626 anatop-min-bit-val = <1>;
627 anatop-min-voltage = <725000>;
628 anatop-max-voltage = <1450000>;
632 compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
633 interrupt-parent = <&gpc>;
636 nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
637 nvmem-cell-names = "calib", "temp_grade";
643 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
647 phy-3p0-supply = <®_3p0>;
652 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
656 phy-3p0-supply = <®_3p0>;
661 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
664 snvs_rtc: snvs-rtc-lp {
665 compatible = "fsl,sec-v4.0-mon-rtc-lp";
672 snvs_poweroff: snvs-poweroff {
673 compatible = "syscon-poweroff";
681 snvs_pwrkey: snvs-powerkey {
682 compatible = "fsl,sec-v4.0-pwrkey";
686 wakeup-source;
690 snvs_lpgpr: snvs-lpgpr {
691 compatible = "fsl,imx6ul-snvs-lpgpr";
705 src: reset-controller@20d8000 {
706 compatible = "fsl,imx6ul-src", "fsl,imx51-src";
710 #reset-cells = <1>;
714 compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc";
716 interrupt-controller;
717 #interrupt-cells = <3>;
719 interrupt-parent = <&intc>;
723 compatible = "fsl,imx6ul-iomuxc";
727 gpr: iomuxc-gpr@20e4000 {
728 compatible = "fsl,imx6ul-iomuxc-gpr",
729 "fsl,imx6q-iomuxc-gpr", "syscon";
734 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
739 clock-names = "ipg", "per";
744 compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma",
745 "fsl,imx35-sdma";
750 clock-names = "ipg", "ahb";
751 #dma-cells = <3>;
752 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
756 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
761 clock-names = "ipg", "per";
762 #pwm-cells = <3>;
767 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
772 clock-names = "ipg", "per";
773 #pwm-cells = <3>;
778 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
783 clock-names = "ipg", "per";
784 #pwm-cells = <3>;
789 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
794 clock-names = "ipg", "per";
795 #pwm-cells = <3>;
801 compatible = "fsl,aips-bus", "simple-bus";
802 #address-cells = <1>;
803 #size-cells = <1>;
808 compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
809 #address-cells = <1>;
810 #size-cells = <1>;
816 clock-names = "ipg", "aclk", "mem";
819 compatible = "fsl,sec-v4.0-job-ring";
825 compatible = "fsl,sec-v4.0-job-ring";
831 compatible = "fsl,sec-v4.0-job-ring";
838 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
845 ahb-burst-config = <0x0>;
846 tx-burst-size-dword = <0x10>;
847 rx-burst-size-dword = <0x10>;
852 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
858 ahb-burst-config = <0x0>;
859 tx-burst-size-dword = <0x10>;
860 rx-burst-size-dword = <0x10>;
865 #index-cells = <1>;
866 compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc";
871 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
873 interrupt-names = "int0", "pps";
881 clock-names = "ipg", "ahb", "ptp",
883 fsl,num-tx-queues = <1>;
884 fsl,num-rx-queues = <1>;
885 fsl,stop-mode = <&gpr 0x10 3>;
890 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
896 clock-names = "ipg", "ahb", "per";
897 fsl,tuning-step = <2>;
898 fsl,tuning-start-tap = <20>;
899 bus-width = <4>;
904 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
910 clock-names = "ipg", "ahb", "per";
911 bus-width = <4>;
912 fsl,tuning-step = <2>;
913 fsl,tuning-start-tap = <20>;
918 compatible = "fsl,imx6ul-adc", "fsl,vf610-adc";
922 num-channels = <2>;
923 clock-names = "adc";
924 fsl,adck-max-frequency = <30000000>, <40000000>,
929 i2c1: i2c@21a0000 {
930 #address-cells = <1>;
931 #size-cells = <0>;
932 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
939 i2c2: i2c@21a4000 {
940 #address-cells = <1>;
941 #size-cells = <0>;
942 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
949 i2c3: i2c@21a8000 {
950 #address-cells = <1>;
951 #size-cells = <0>;
952 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
959 memory-controller@21b0000 {
960 compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
966 #address-cells = <2>;
967 #size-cells = <1>;
968 compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim";
972 fsl,weim-cs-gpr = <&gpr>;
977 #address-cells = <1>;
978 #size-cells = <1>;
979 compatible = "fsl,imx6ul-ocotp", "syscon";
987 tempmon_temp_grade: temp-grade@20 {
991 cpu_speed_grade: speed-grade@10 {
997 compatible = "fsl,imx6ul-csi", "fsl,imx7-csi";
1001 clock-names = "mclk";
1006 compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
1012 clock-names = "pix", "axi", "disp_axi";
1017 compatible = "fsl,imx6ul-pxp";
1021 clock-names = "axi";
1025 #address-cells = <1>;
1026 #size-cells = <0>;
1027 compatible = "fsl,imx6ul-qspi", "fsl,imx6sx-qspi";
1029 reg-names = "QuadSPI", "QuadSPI-memory";
1033 clock-names = "qspi_en", "qspi";
1038 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
1046 compatible = "fsl,imx6ul-uart",
1047 "fsl,imx6q-uart";
1052 clock-names = "ipg", "per";
1057 compatible = "fsl,imx6ul-uart",
1058 "fsl,imx6q-uart";
1063 clock-names = "ipg", "per";
1068 compatible = "fsl,imx6ul-uart",
1069 "fsl,imx6q-uart";
1074 clock-names = "ipg", "per";
1079 compatible = "fsl,imx6ul-uart",
1080 "fsl,imx6q-uart";
1085 clock-names = "ipg", "per";
1089 i2c4: i2c@21f8000 {
1090 #address-cells = <1>;
1091 #size-cells = <0>;
1092 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
1100 compatible = "fsl,imx6ul-uart",
1101 "fsl,imx6q-uart";
1106 clock-names = "ipg", "per";