Lines Matching +full:0 +full:x6000
17 memory@0 { /* 128 MB */
19 reg = <0x00000000 0x8000000>;
62 #size-cells = <0>;
73 #size-cells = <0>;
81 switch@0 {
83 reg = <0>;
91 #size-cells = <0>;
93 port@0 {
94 reg = <0>;
129 pinctrl-0 = <&pflash_default_pins>;
132 reg = <0x30000000 0x01000000>;
136 /* Eraseblock at 0xfe0000 */
137 fis-index-block = <0x1fc>;
186 skew-delay = <0>;
238 cortina,gemini-ata-muxmode = <0>;
245 pinctrl-0 = <&gpio0_default_pins>;
250 pinctrl-0 = <&gpio1_default_pins>;
255 interrupt-map-mask = <0xf800 0 0 7>;
257 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
258 <0x4800 0 0 2 &pci_intc 1>,
259 <0x4800 0 0 3 &pci_intc 2>,
260 <0x4800 0 0 4 &pci_intc 3>,
261 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
262 <0x5000 0 0 2 &pci_intc 2>,
263 <0x5000 0 0 3 &pci_intc 3>,
264 <0x5000 0 0 4 &pci_intc 0>,
265 <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
266 <0x5800 0 0 2 &pci_intc 3>,
267 <0x5800 0 0 3 &pci_intc 0>,
268 <0x5800 0 0 4 &pci_intc 1>,
269 <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
270 <0x6000 0 0 2 &pci_intc 0>,
271 <0x6000 0 0 3 &pci_intc 1>,
272 <0x6000 0 0 4 &pci_intc 2>;
278 ethernet-port@0 {