Lines Matching +full:0 +full:x12200000
162 reg = <0x10d20000 0x1000>;
163 ranges = <0x0 0x10d20000 0x6000>;
168 reg = <0x4000 0x1000>;
173 reg = <0x5000 0x1000>;
179 reg = <0x10010000 0x30000>;
185 reg = <0x03810000 0x0C>;
195 reg = <0x11000000 0x10000>;
208 #size-cells = <0>;
209 reg = <0x12200000 0x2000>;
212 fifo-depth = <0x40>;
220 #size-cells = <0>;
221 reg = <0x12210000 0x2000>;
224 fifo-depth = <0x40>;
232 #size-cells = <0>;
233 reg = <0x12220000 0x1000>;
236 fifo-depth = <0x40>;
242 reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>;
244 interrupts = <16 0>, <16 1>;
268 reg = <0x10CA1000 0x200>;
274 reg = <0x10CA1400 0x200>;
280 reg = <0x10CA1800 0x200>;
286 reg = <0x10CA1C00 0x200>;
292 reg = <0x11A51000 0x200>;
298 reg = <0x11A51400 0x200>;
304 reg = <0x10d00000 0x2000>;
316 reg = <0x10d10000 0x2000>;
328 reg = <0x10d60000 0x2000>;
340 reg = <0x10d70000 0x2000>;
352 reg = <0x10044000 0x20>;
353 #power-domain-cells = <0>;
359 reg = <0x10044020 0x20>;
360 #power-domain-cells = <0>;
366 reg = <0x10044060 0x20>;
367 #power-domain-cells = <0>;
373 reg = <0x10044080 0x20>;
374 #power-domain-cells = <0>;
380 reg = <0x100440C0 0x20>;
381 #power-domain-cells = <0>;
387 reg = <0x100440E0 0x20>;
388 #power-domain-cells = <0>;
394 reg = <0x10044120 0x20>;
395 #power-domain-cells = <0>;
401 reg = <0x13400000 0x1000>;
413 reg = <0x13410000 0x1000>;
419 reg = <0x14000000 0x1000>;
425 reg = <0x14010000 0x1000>;
431 reg = <0x03860000 0x1000>;
438 reg = <0x03880000 0x1000>;
450 reg = <0x121A0000 0x1000>;
461 reg = <0x121B0000 0x1000>;
472 reg = <0x10800000 0x1000>;
483 reg = <0x11C10000 0x1000>;
502 reg = <0x03830000 0x100>;
503 dmas = <&adma 0>,
514 samsung,idma-addr = <0x03000000>;
516 pinctrl-0 = <&i2s0_bus>;
523 reg = <0x12D60000 0x100>;
533 pinctrl-0 = <&i2s1_bus>;
539 reg = <0x12D70000 0x100>;
549 pinctrl-0 = <&i2s2_bus>;
555 reg = <0x12d20000 0x100>;
561 #size-cells = <0>;
563 pinctrl-0 = <&spi0_bus>;
571 reg = <0x12d30000 0x100>;
577 #size-cells = <0>;
579 pinctrl-0 = <&spi1_bus>;
587 reg = <0x12d40000 0x100>;
593 #size-cells = <0>;
595 pinctrl-0 = <&spi2_bus>;
604 #phy-cells = <0>;
615 reg = <0x14500000 0x10000>;
622 #size-cells = <0>;
628 reg = <0x12E00000 0x1000>;
631 #size-cells = <0>;
633 pinctrl-0 = <&i2c8_hs_bus>;
641 reg = <0x12E10000 0x1000>;
644 #size-cells = <0>;
646 pinctrl-0 = <&i2c9_hs_bus>;
654 reg = <0x12E20000 0x1000>;
657 #size-cells = <0>;
659 pinctrl-0 = <&i2c10_hs_bus>;
667 reg = <0x14530000 0x70000>;
678 #sound-dai-cells = <0>;
682 reg = <0x145D0000 0x20>;
687 reg = <0x101B0000 0x200>;
694 pinctrl-0 = <&hdmi_cec>;
700 reg = <0x14450000 0x10000>;
712 reg = <0x11C00000 0x64>;
721 reg = <0x13e00000 0x1000>;
731 reg = <0x13e10000 0x1000>;
741 reg = <0x11800000 0x5000>;
791 reg = <0x12800000 0x1294>;
792 interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH>;
801 reg = <0x12810000 0x1294>;
802 interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>;
811 reg = <0x12820000 0x1294>;
812 interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>;
821 reg = <0x11F50000 0x1000>;
830 reg = <0x11F60000 0x1000>;
839 reg = <0x10040000 0x5000>;
850 reg = <0x10060000 0x100>;
854 #thermal-sensor-cells = <0>;
859 reg = <0x10064000 0x100>;
863 #thermal-sensor-cells = <0>;
868 reg = <0x10068000 0x100>, <0x1006c000 0x4>;
872 #thermal-sensor-cells = <0>;
877 reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
881 #thermal-sensor-cells = <0>;
886 reg = <0x100a0000 0x100>, <0x10068000 0x4>;
890 #thermal-sensor-cells = <0>;
895 reg = <0x10A60000 0x1000>;
900 #iommu-cells = <0>;
905 reg = <0x10A70000 0x1000>;
910 #iommu-cells = <0>;
915 reg = <0x14650000 0x1000>;
921 #iommu-cells = <0>;
926 reg = <0x13E80000 0x1000>;
928 interrupts = <2 0>;
932 #iommu-cells = <0>;
937 reg = <0x13E90000 0x1000>;
943 #iommu-cells = <0>;
948 reg = <0x12880000 0x1000>;
954 #iommu-cells = <0>;
959 reg = <0x12890000 0x1000>;
964 #iommu-cells = <0>;
969 reg = <0x128A0000 0x1000>;
974 #iommu-cells = <0>;
979 reg = <0x128C0000 0x1000>;
985 #iommu-cells = <0>;
990 reg = <0x128D0000 0x1000>;
996 #iommu-cells = <0>;
1001 reg = <0x128E0000 0x1000>;
1007 #iommu-cells = <0>;
1012 reg = <0x11D40000 0x1000>;
1014 interrupts = <4 0>;
1017 #iommu-cells = <0>;
1022 reg = <0x11F10000 0x1000>;
1027 #iommu-cells = <0>;
1032 reg = <0x11F20000 0x1000>;
1036 #iommu-cells = <0>;
1041 reg = <0x11200000 0x1000>;
1047 #iommu-cells = <0>;
1052 reg = <0x11210000 0x1000>;
1058 #iommu-cells = <0>;
1063 reg = <0x14640000 0x1000>;
1069 #iommu-cells = <0>;
1074 reg = <0x14680000 0x1000>;
1076 interrupts = <3 0>;
1080 #iommu-cells = <0>;
1254 pinctrl-0 = <&i2c0_bus>;
1261 pinctrl-0 = <&i2c1_bus>;
1268 pinctrl-0 = <&i2c2_bus>;
1275 pinctrl-0 = <&i2c3_bus>;
1282 pinctrl-0 = <&i2c4_hs_bus>;
1289 pinctrl-0 = <&i2c5_hs_bus>;
1296 pinctrl-0 = <&i2c6_hs_bus>;
1303 pinctrl-0 = <&i2c7_hs_bus>;