Lines Matching +full:interrupt +full:- +full:partition +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "dra7-ipu-dsp-common.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/clock/ti-dra7-atl.h>
13 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
20 stdout-path = &uart1;
23 evm_12v0: fixedregulator-evm12v0 {
25 compatible = "regulator-fixed";
26 regulator-name = "evm_12v0";
27 regulator-min-microvolt = <12000000>;
28 regulator-max-microvolt = <12000000>;
29 regulator-always-on;
30 regulator-boot-on;
33 evm_5v0: fixedregulator-evm5v0 {
34 /* Output 1 of TPS43351QDAPRQ1 on dra72-evm */
35 /* Output 1 of LM5140QRWGTQ1 on dra71-evm */
36 compatible = "regulator-fixed";
37 regulator-name = "evm_5v0";
38 regulator-min-microvolt = <5000000>;
39 regulator-max-microvolt = <5000000>;
40 vin-supply = <&evm_12v0>;
41 regulator-always-on;
42 regulator-boot-on;
45 evm_3v6: fixedregulator-evm_3v6 {
46 compatible = "regulator-fixed";
47 regulator-name = "evm_3v6";
48 regulator-min-microvolt = <3600000>;
49 regulator-max-microvolt = <3600000>;
50 vin-supply = <&evm_5v0>;
51 regulator-always-on;
52 regulator-boot-on;
55 vsys_3v3: fixedregulator-vsys3v3 {
56 /* Output 2 of TPS43351QDAPRQ1 on dra72-evm */
57 /* Output 2 of LM5140QRWGTQ1 on dra71-evm */
58 compatible = "regulator-fixed";
59 regulator-name = "vsys_3v3";
60 regulator-min-microvolt = <3300000>;
61 regulator-max-microvolt = <3300000>;
62 vin-supply = <&evm_12v0>;
63 regulator-always-on;
64 regulator-boot-on;
67 evm_3v3_sw: fixedregulator-evm_3v3 {
69 compatible = "regulator-fixed";
70 regulator-name = "evm_3v3";
71 regulator-min-microvolt = <3300000>;
72 regulator-max-microvolt = <3300000>;
73 vin-supply = <&vsys_3v3>;
74 regulator-always-on;
75 regulator-boot-on;
78 aic_dvdd: fixedregulator-aic_dvdd {
80 compatible = "regulator-fixed";
81 regulator-name = "aic_dvdd";
82 vin-supply = <&evm_3v3_sw>;
83 regulator-min-microvolt = <1800000>;
84 regulator-max-microvolt = <1800000>;
87 evm_3v3_sd: fixedregulator-sd {
88 compatible = "regulator-fixed";
89 regulator-name = "evm_3v3_sd";
90 regulator-min-microvolt = <3300000>;
91 regulator-max-microvolt = <3300000>;
92 vin-supply = <&evm_3v3_sw>;
93 enable-active-high;
98 compatible = "linux,extcon-usb-gpio";
99 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
103 compatible = "linux,extcon-usb-gpio";
104 id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
108 compatible = "hdmi-connector";
115 remote-endpoint = <&tpd12s015_out>;
128 #address-cells = <1>;
129 #size-cells = <0>;
135 remote-endpoint = <&hdmi_out>;
143 remote-endpoint = <&hdmi_connector_in>;
150 compatible = "simple-audio-card";
151 simple-audio-card,name = "DRA7xx-EVM";
152 simple-audio-card,widgets =
157 simple-audio-card,routing =
167 simple-audio-card,format = "dsp_b";
168 simple-audio-card,bitclock-master = <&sound0_master>;
169 simple-audio-card,frame-master = <&sound0_master>;
170 simple-audio-card,bitclock-inversion;
172 sound0_master: simple-audio-card,cpu {
173 sound-dai = <&mcasp3>;
174 system-clock-frequency = <5644800>;
177 simple-audio-card,codec {
178 sound-dai = <&tlv320aic3106>;
183 vmmcwl_fixed: fixedregulator-mmcwl {
184 compatible = "regulator-fixed";
185 regulator-name = "vmmcwl_fixed";
186 regulator-min-microvolt = <1800000>;
187 regulator-max-microvolt = <1800000>;
189 enable-active-high;
193 compatible = "fixed-clock";
194 #clock-cells = <0>;
195 clock-frequency = <24000000>;
201 pinctrl-single,pins = <
208 pinctrl-single,pins = <
217 clock-frequency = <400000>;
222 gpio-controller;
223 #gpio-cells = <2>;
224 interrupt-controller;
225 #interrupt-cells = <2>;
231 lines-initial-states = <0x1408>;
232 gpio-controller;
233 #gpio-cells = <2>;
234 interrupt-controller;
235 #interrupt-cells = <2>;
239 #sound-dai-cells = <0>;
242 adc-settle-ms = <40>;
243 ai3x-micbias-vg = <1>; /* 2.0V */
247 AVDD-supply = <&evm_3v3_sw>;
248 IOVDD-supply = <&evm_3v3_sw>;
249 DRVDD-supply = <&evm_3v3_sw>;
250 DVDD-supply = <&aic_dvdd>;
256 clock-frequency = <400000>;
261 gpio-controller;
262 #gpio-cells = <2>;
269 lines-initial-states = <0x0f2b>;
273 gpio-hog;
275 output-low;
276 line-name = "vin6_sel_s0";
285 clock-names = "xclk";
289 remote-endpoint = <&csi2_phy0>;
290 clock-lanes = <0>;
291 data-lanes = <1 2>;
300 interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
310 * For the existing IOdelay configuration via U-Boot we don't
311 * support NAND on dra72-evm. Keep it disabled. Enabling it
312 * requires a different configuration by U-Boot.
315 ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */
321 compatible = "ti,omap2-nand";
323 interrupt-parent = <&gpmc>;
326 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
327 ti,nand-xfer-type = "prefetch-dma";
328 ti,nand-ecc-opt = "bch8";
329 ti,elm-id = <&elm>;
330 nand-bus-width = <16>;
331 gpmc,device-width = <2>;
332 gpmc,sync-clk-ps = <0>;
333 gpmc,cs-on-ns = <0>;
334 gpmc,cs-rd-off-ns = <80>;
335 gpmc,cs-wr-off-ns = <80>;
336 gpmc,adv-on-ns = <0>;
337 gpmc,adv-rd-off-ns = <60>;
338 gpmc,adv-wr-off-ns = <60>;
339 gpmc,we-on-ns = <10>;
340 gpmc,we-off-ns = <50>;
341 gpmc,oe-on-ns = <4>;
342 gpmc,oe-off-ns = <40>;
343 gpmc,access-ns = <40>;
344 gpmc,wr-access-ns = <80>;
345 gpmc,rd-cycle-ns = <80>;
346 gpmc,wr-cycle-ns = <80>;
347 gpmc,bus-turnaround-ns = <0>;
348 gpmc,cycle2cycle-delay-ns = <0>;
349 gpmc,clk-activation-ns = <0>;
350 gpmc,wr-data-mux-bus-ns = <0>;
351 /* MTD partition table */
352 /* All SPL-* partitions are sized to minimal length
354 * NAND flash this is equal to size of erase-block */
355 #address-cells = <1>;
356 #size-cells = <1>;
357 partition@0 {
361 partition@1 {
365 partition@2 {
369 partition@3 {
373 partition@4 {
374 label = "NAND.u-boot-spl-os";
377 partition@5 {
378 label = "NAND.u-boot";
381 partition@6 {
382 label = "NAND.u-boot-env";
385 partition@7 {
386 label = "NAND.u-boot-env.backup1";
389 partition@8 {
393 partition@9 {
394 label = "NAND.file-system";
420 pinctrl-names = "default";
421 pinctrl-0 = <&mmc1_pins_default>;
422 vmmc-supply = <&evm_3v3_sd>;
423 bus-width = <4>;
425 * SDCD signal is not being used here - using the fact that GPIO mode
428 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
429 max-frequency = <192000000>;
433 /* SW5-3 in ON position */
435 pinctrl-names = "default";
436 pinctrl-0 = <&mmc2_pins_default>;
437 bus-width = <8>;
438 non-removable;
439 max-frequency = <192000000>;
444 vmmc-supply = <&evm_3v6>;
445 vqmmc-supply = <&vmmcwl_fixed>;
446 bus-width = <4>;
447 cap-power-off-card;
448 keep-power-in-suspend;
449 non-removable;
450 pinctrl-names = "default", "hs", "sdr12", "sdr25";
451 pinctrl-0 = <&mmc4_pins_default>;
452 pinctrl-1 = <&mmc4_pins_default>;
453 pinctrl-2 = <&mmc4_pins_default>;
454 pinctrl-3 = <&mmc4_pins_default>;
455 #address-cells = <1>;
456 #size-cells = <0>;
460 interrupt-parent = <&gpio5>;
467 pinctrl-names = "default", "sleep", "active";
468 pinctrl-0 = <&dcan1_pins_sleep>;
469 pinctrl-1 = <&dcan1_pins_sleep>;
470 pinctrl-2 = <&dcan1_pins_default>;
476 spi-max-frequency = <76800000>;
479 spi-max-frequency = <76800000>;
481 spi-tx-bus-width = <1>;
482 spi-rx-bus-width = <4>;
483 #address-cells = <1>;
484 #size-cells = <1>;
486 /* MTD partition table.
491 partition@0 {
495 partition@1 {
499 partition@2 {
503 partition@3 {
507 partition@4 {
508 label = "QSPI.u-boot";
511 partition@5 {
512 label = "QSPI.u-boot-spl-os";
515 partition@6 {
516 label = "QSPI.u-boot-env";
519 partition@7 {
520 label = "QSPI.u-boot-env.backup1";
523 partition@8 {
527 partition@9 {
528 label = "QSPI.file-system";
543 remote-endpoint = <&tpd12s015_in>;
549 assigned-clocks = <&abe_dpll_sys_clk_mux>,
554 assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
555 assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>;
566 #sound-dai-cells = <0>;
568 assigned-clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
569 assigned-clock-parents = <&atl_clkin2_ck>;
573 op-mode = <0>; /* MCASP_IIS_MODE */
574 tdm-slots = <2>;
576 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
579 tx-num-evt = <32>;
580 rx-num-evt = <32>;
589 remote-endpoint = <&csi2_cam0>;
590 clock-lanes = <0>;
591 data-lanes = <1 2>;