Lines Matching +full:mv64xxx +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
12 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "marvell,pj4a", "marvell,sheeva-v7";
27 next-level-cache = <&l2>;
32 l2: l2-cache {
33 compatible = "marvell,tauros2-cache";
34 marvell,tauros2-cache-features = <0>;
37 gpu-subsystem {
38 compatible = "marvell,dove-gpu-subsystem";
43 i2c-mux {
44 compatible = "i2c-mux-pinctrl";
45 #address-cells = <1>;
46 #size-cells = <0>;
48 i2c-parent = <&i2c>;
50 pinctrl-names = "i2c0", "i2c1", "i2c2";
51 pinctrl-0 = <&pmx_i2cmux_0>;
52 pinctrl-1 = <&pmx_i2cmux_1>;
53 pinctrl-2 = <&pmx_i2cmux_2>;
55 i2c0: i2c@0 {
57 #address-cells = <1>;
58 #size-cells = <0>;
62 i2c1: i2c@1 {
64 #address-cells = <1>;
65 #size-cells = <0>;
66 /* Requires pmx_i2c1 on i2c controller node */
70 i2c2: i2c@2 {
72 #address-cells = <1>;
73 #size-cells = <0>;
74 /* Requires pmx_i2c2 on i2c controller node */
80 compatible = "marvell,dove-mbus", "marvell,mbus", "simple-bus";
81 #address-cells = <2>;
82 #size-cells = <1>;
84 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256M MEM space */
85 pcie-io-aperture = <0xf2000000 0x00200000>; /* 2M I/O space */
94 compatible = "marvell,dove-pcie";
97 #address-cells = <3>;
98 #size-cells = <2>;
100 msi-parent = <&intc>;
101 bus-range = <0x00 0xff>;
113 assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
116 marvell,pcie-port = <0>;
118 #address-cells = <3>;
119 #size-cells = <2>;
122 bus-range = <0x00 0xff>;
124 #interrupt-cells = <1>;
125 interrupt-map-mask = <0 0 0 0>;
126 interrupt-map = <0 0 0 0 &intc 16>;
132 assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
135 marvell,pcie-port = <1>;
137 #address-cells = <3>;
138 #size-cells = <2>;
141 bus-range = <0x00 0xff>;
143 #interrupt-cells = <1>;
144 interrupt-map-mask = <0 0 0 0>;
145 interrupt-map = <0 0 0 0 &intc 18>;
149 internal-regs {
150 compatible = "simple-bus";
151 #address-cells = <1>;
152 #size-cells = <1>;
159 compatible = "marvell,orion-spi";
160 #address-cells = <1>;
161 #size-cells = <0>;
162 cell-index = <0>;
166 pinctrl-0 = <&pmx_spi0>;
167 pinctrl-names = "default";
171 i2c: i2c@11000 { label
172 compatible = "marvell,mv64xxx-i2c";
174 #address-cells = <1>;
175 #size-cells = <0>;
177 clock-frequency = <400000>;
185 reg-shift = <2>;
194 reg-shift = <2>;
197 pinctrl-0 = <&pmx_uart1>;
198 pinctrl-names = "default";
205 reg-shift = <2>;
214 reg-shift = <2>;
221 compatible = "marvell,orion-spi";
222 #address-cells = <1>;
223 #size-cells = <0>;
224 cell-index = <1>;
231 mbusc: mbus-ctrl@20000 {
232 compatible = "marvell,mbus-controller";
236 sysc: system-ctrl@20000 {
237 compatible = "marvell,orion-system-controller";
241 bridge_intc: bridge-interrupt-ctrl@20110 {
242 compatible = "marvell,orion-bridge-intc";
243 interrupt-controller;
244 #interrupt-cells = <1>;
250 intc: interrupt-controller@20200 {
251 compatible = "marvell,orion-intc";
252 interrupt-controller;
253 #interrupt-cells = <1>;
258 compatible = "marvell,orion-timer";
260 interrupt-parent = <&bridge_intc>;
266 compatible = "marvell,orion-wdt";
268 interrupt-parent = <&bridge_intc>;
273 crypto: crypto-engine@30000 {
274 compatible = "marvell,dove-crypto";
276 reg-names = "regs";
279 marvell,crypto-srams = <&crypto_sram>;
280 marvell,crypto-sram-size = <0x800>;
284 ehci0: usb-host@50000 {
285 compatible = "marvell,orion-ehci";
292 ehci1: usb-host@51000 {
293 compatible = "marvell,orion-ehci";
300 xor0: dma-engine@60800 {
301 compatible = "marvell,orion-xor";
320 xor1: dma-engine@60900 {
321 compatible = "marvell,orion-xor";
340 sdio1: sdio-host@90000 {
341 compatible = "marvell,dove-sdhci";
345 pinctrl-0 = <&pmx_sdio1>;
346 pinctrl-names = "default";
350 eth: ethernet-ctrl@72000 {
351 compatible = "marvell,orion-eth";
352 #address-cells = <1>;
353 #size-cells = <0>;
356 marvell,tx-checksum-limit = <1600>;
359 ethernet-port@0 {
360 compatible = "marvell,orion-eth-port";
364 local-mac-address = [00 00 00 00 00 00];
365 phy-handle = <ðphy>;
369 mdio: mdio-bus@72004 {
370 compatible = "marvell,orion-mdio";
371 #address-cells = <1>;
372 #size-cells = <0>;
378 ethphy: ethernet-phy {
383 sdio0: sdio-host@92000 {
384 compatible = "marvell,dove-sdhci";
388 pinctrl-0 = <&pmx_sdio0>;
389 pinctrl-names = "default";
393 sata0: sata-host@a0000 {
394 compatible = "marvell,orion-sata";
399 phy-names = "port0";
400 nr-ports = <1>;
404 sata_phy0: sata-phy@a2000 {
405 compatible = "marvell,mvebu-sata-phy";
408 clock-names = "sata";
409 #phy-cells = <0>;
413 audio0: audio-controller@b0000 {
414 compatible = "marvell,dove-audio";
418 clock-names = "internal";
422 audio1: audio-controller@b4000 {
423 compatible = "marvell,dove-audio";
427 clock-names = "internal";
431 pmu: power-management@d0000 {
432 compatible = "marvell,dove-pmu", "simple-bus";
437 interrupt-controller;
438 #address-cells = <1>;
439 #size-cells = <1>;
440 #interrupt-cells = <1>;
441 #reset-cells = <1>;
444 vpu_domain: vpu-domain {
445 #power-domain-cells = <0>;
451 gpu_domain: gpu-domain {
452 #power-domain-cells = <0>;
459 thermal: thermal-diode@1c {
460 compatible = "marvell,dove-thermal";
464 gate_clk: clock-gating-ctrl@38 {
465 compatible = "marvell,dove-gating-clock";
468 #clock-cells = <1>;
471 divider_clk: core-clock@64 {
472 compatible = "marvell,dove-divider-clock";
474 #clock-cells = <1>;
477 pinctrl: pin-ctrl@200 {
478 compatible = "marvell,dove-pinctrl";
483 pmx_gpio_0: pmx-gpio-0 {
488 pmx_gpio_1: pmx-gpio-1 {
493 pmx_gpio_2: pmx-gpio-2 {
498 pmx_gpio_3: pmx-gpio-3 {
503 pmx_gpio_4: pmx-gpio-4 {
508 pmx_gpio_5: pmx-gpio-5 {
513 pmx_gpio_6: pmx-gpio-6 {
518 pmx_gpio_7: pmx-gpio-7 {
523 pmx_gpio_8: pmx-gpio-8 {
528 pmx_gpio_9: pmx-gpio-9 {
533 pmx_pcie1_clkreq: pmx-pcie1-clkreq {
538 pmx_gpio_10: pmx-gpio-10 {
543 pmx_gpio_11: pmx-gpio-11 {
548 pmx_pcie0_clkreq: pmx-pcie0-clkreq {
553 pmx_gpio_12: pmx-gpio-12 {
558 pmx_gpio_13: pmx-gpio-13 {
563 pmx_audio1_extclk: pmx-audio1-extclk {
568 pmx_gpio_14: pmx-gpio-14 {
573 pmx_gpio_15: pmx-gpio-15 {
578 pmx_gpio_16: pmx-gpio-16 {
583 pmx_gpio_17: pmx-gpio-17 {
588 pmx_gpio_18: pmx-gpio-18 {
593 pmx_gpio_19: pmx-gpio-19 {
598 pmx_gpio_20: pmx-gpio-20 {
603 pmx_gpio_21: pmx-gpio-21 {
608 pmx_camera: pmx-camera {
613 pmx_camera_gpio: pmx-camera-gpio {
618 pmx_sdio0: pmx-sdio0 {
623 pmx_sdio0_gpio: pmx-sdio0-gpio {
628 pmx_sdio1: pmx-sdio1 {
633 pmx_sdio1_gpio: pmx-sdio1-gpio {
638 pmx_audio1_gpio: pmx-audio1-gpio {
643 pmx_audio1_i2s1_spdifo: pmx-audio1-i2s1-spdifo {
648 pmx_spi0: pmx-spi0 {
653 pmx_spi0_gpio: pmx-spi0-gpio {
658 pmx_spi1_4_7: pmx-spi1-4-7 {
664 pmx_spi1_20_23: pmx-spi1-20-23 {
670 pmx_uart1: pmx-uart1 {
675 pmx_uart1_gpio: pmx-uart1-gpio {
680 pmx_nand: pmx-nand {
685 pmx_nand_gpo: pmx-nand-gpo {
690 pmx_i2c1: pmx-i2c1 {
695 pmx_i2c2: pmx-i2c2 {
700 pmx_ssp_i2c2: pmx-ssp-i2c2 {
705 pmx_i2cmux_0: pmx-i2cmux-0 {
707 marvell,function = "twsi-opt1";
710 pmx_i2cmux_1: pmx-i2cmux-1 {
712 marvell,function = "twsi-opt2";
715 pmx_i2cmux_2: pmx-i2cmux-2 {
717 marvell,function = "twsi-opt3";
721 core_clk: core-clocks@214 {
722 compatible = "marvell,dove-core-clock";
724 #clock-cells = <1>;
727 gpio0: gpio-ctrl@400 {
728 compatible = "marvell,orion-gpio";
729 #gpio-cells = <2>;
730 gpio-controller;
733 interrupt-controller;
734 #interrupt-cells = <2>;
735 interrupt-parent = <&intc>;
739 gpio1: gpio-ctrl@420 {
740 compatible = "marvell,orion-gpio";
741 #gpio-cells = <2>;
742 gpio-controller;
745 interrupt-controller;
746 #interrupt-cells = <2>;
747 interrupt-parent = <&intc>;
751 rtc: real-time-clock@8500 {
752 compatible = "marvell,orion-rtc";
758 gconf: global-config@e802c {
759 compatible = "marvell,dove-global-config",
764 gpio2: gpio-ctrl@e8400 {
765 compatible = "marvell,orion-gpio";
766 #gpio-cells = <2>;
767 gpio-controller;
772 lcd1: lcd-controller@810000 {
773 compatible = "marvell,dove-lcd";
779 lcd0: lcd-controller@820000 {
780 compatible = "marvell,dove-lcd";
787 compatible = "mmio-sram";
790 #address-cells = <1>;
791 #size-cells = <1>;
796 clock-names = "core";
799 power-domains = <&gpu_domain>;