Lines Matching +full:0 +full:x34000000

32 		#size-cells = <0>;
34 		cpu0: cpu@0 {
37 			reg = <0>;
44 			secondary-boot-reg = <0x3500417c>;
52 		#address-cells = <0>;
54 		reg = <0x3ff01000 0x1000>,
55 		      <0x3ff00100 0x100>;
60 		reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
66 		reg = <0x3e000000 0x1000>;
76 		reg = <0x3e001000 0x1000>;
86 		reg = <0x3e002000 0x1000>;
96 		reg = <0x3e003000 0x1000>;
105 		reg = <0x3ff20000 0x1000>;
112 		reg = <0x35002f40 0x6c>;
117 		reg = <0x35006000 0x1000>;
124 		reg = <0x35003000 0x800>;
140 		reg = <0x3f180000 0x10000>;
148 		reg = <0x3f190000 0x10000>;
156 		reg = <0x3f1a0000 0x10000>;
164 		reg = <0x3f1b0000 0x10000>;
172 		reg = <0x35004800 0x430>;
177 		reg = <0x3e016000 0x80>;
180 		#size-cells = <0>;
187 		reg = <0x3e017000 0x80>;
190 		#size-cells = <0>;
197 		reg = <0x3e018000 0x80>;
200 		#size-cells = <0>;
207 		reg = <0x3500d000 0x80>;
210 		#size-cells = <0>;
217 		reg = <0x3e01a000 0xcc>;
230 			reg = <0x35001000 0x0f00>;
237 			reg = <0x34000000 0x0f00>;
244 			reg = <0x35002000 0x0f00>;
253 			reg = <0x3f001000 0x0f00>;
266 			reg = <0x3e011000 0x0f00>;
281 			#clock-cells = <0>;
287 			#clock-cells = <0>;
293 			#clock-cells = <0>;
299 			#clock-cells = <0>;
305 			#clock-cells = <0>;
311 			#clock-cells = <0>;
317 			#clock-cells = <0>;
323 			#clock-cells = <0>;
329 			#clock-cells = <0>;
335 			#clock-cells = <0>;
343 			#clock-cells = <0>;
347 			#clock-cells = <0>;
353 			#clock-cells = <0>;
359 			#clock-cells = <0>;
365 			#clock-cells = <0>;
371 			#clock-cells = <0>;
377 			#clock-cells = <0>;
383 			#clock-cells = <0>;
389 			#clock-cells = <0>;
395 			#clock-cells = <0>;
401 			#clock-cells = <0>;
409 		reg = <0x3f120000 0x10000>;
420 		reg = <0x3f130000 0x28>;
421 		#phy-cells = <0>;