Lines Matching +full:sda +full:- +full:open +full:- +full:drain
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
22 interrupt-parent = <&aic>;
42 #address-cells = <1>;
43 #size-cells = <0>;
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
65 compatible = "fixed-clock";
66 #clock-cells = <0>;
67 clock-frequency = <0>;
72 compatible = "mmio-sram";
74 #address-cells = <1>;
75 #size-cells = <1>;
80 compatible = "simple-bus";
81 #address-cells = <1>;
82 #size-cells = <1>;
86 compatible = "simple-bus";
87 #address-cells = <1>;
88 #size-cells = <1>;
91 aic: interrupt-controller@fffff000 {
92 #interrupt-cells = <3>;
93 compatible = "atmel,at91rm9200-aic";
94 interrupt-controller;
96 atmel,external-irqs = <25 26 27 28 29 30 31>;
100 compatible = "atmel,at91rm9200-sdramc", "syscon";
105 compatible = "atmel,at91rm9200-pmc", "syscon";
108 #clock-cells = <2>;
110 clock-names = "slow_xtal", "main_xtal";
114 compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
120 compatible = "atmel,at91rm9200-wdt";
125 compatible = "atmel,at91rm9200-rtc";
133 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
134 #address-cells = <1>;
135 #size-cells = <0>;
141 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
145 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
146 #address-cells = <1>;
147 #size-cells = <0>;
153 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
157 compatible = "atmel,at91rm9200-i2c";
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_twi>;
163 #address-cells = <1>;
164 #size-cells = <0>;
173 clock-names = "mci_clk";
174 #address-cells = <1>;
175 #size-cells = <0>;
180 compatible = "atmel,at91rm9200-ssc";
183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
186 clock-names = "pclk";
191 compatible = "atmel,at91rm9200-ssc";
194 pinctrl-names = "default";
195 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
197 clock-names = "pclk";
202 compatible = "atmel,at91rm9200-ssc";
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
208 clock-names = "pclk";
213 compatible = "cdns,at91rm9200-emac", "cdns,emac";
216 phy-mode = "rmii";
217 pinctrl-names = "default";
218 pinctrl-0 = <&pinctrl_macb_rmii>;
220 clock-names = "ether_clk";
225 #address-cells = <1>;
226 #size-cells = <1>;
227 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
230 atmel,mux-mask = <
240 pinctrl_dbgu: dbgu-0 {
248 pinctrl_uart0: uart0-0 {
254 pinctrl_uart0_cts: uart0_cts-0 {
259 pinctrl_uart0_rts: uart0_rts-0 {
266 pinctrl_uart1: uart1-0 {
272 pinctrl_uart1_rts: uart1_rts-0 {
277 pinctrl_uart1_cts: uart1_cts-0 {
282 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
288 pinctrl_uart1_dcd: uart1_dcd-0 {
293 pinctrl_uart1_ri: uart1_ri-0 {
300 pinctrl_uart2: uart2-0 {
306 pinctrl_uart2_rts: uart2_rts-0 {
311 pinctrl_uart2_cts: uart2_cts-0 {
318 pinctrl_uart3: uart3-0 {
324 pinctrl_uart3_rts: uart3_rts-0 {
329 pinctrl_uart3_cts: uart3_cts-0 {
336 pinctrl_nand: nand-0 {
344 pinctrl_macb_rmii: macb_rmii-0 {
358 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
372 pinctrl_mmc0_clk: mmc0_clk-0 {
377 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
383 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
390 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
396 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
405 pinctrl_ssc0_tx: ssc0_tx-0 {
412 pinctrl_ssc0_rx: ssc0_rx-0 {
421 pinctrl_ssc1_tx: ssc1_tx-0 {
428 pinctrl_ssc1_rx: ssc1_rx-0 {
437 pinctrl_ssc2_tx: ssc2_tx-0 {
444 pinctrl_ssc2_rx: ssc2_rx-0 {
453 pinctrl_twi: twi-0 {
459 pinctrl_twi_gpio: twi_gpio-0 {
467 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
471 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
475 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
479 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
483 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
487 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
491 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
495 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
499 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
505 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
509 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
513 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
517 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
521 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
525 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
529 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
533 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
537 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
543 pinctrl_spi0: spi0-0 {
552 compatible = "atmel,at91rm9200-gpio";
555 #gpio-cells = <2>;
556 gpio-controller;
557 interrupt-controller;
558 #interrupt-cells = <2>;
563 compatible = "atmel,at91rm9200-gpio";
566 #gpio-cells = <2>;
567 gpio-controller;
568 interrupt-controller;
569 #interrupt-cells = <2>;
574 compatible = "atmel,at91rm9200-gpio";
577 #gpio-cells = <2>;
578 gpio-controller;
579 interrupt-controller;
580 #interrupt-cells = <2>;
585 compatible = "atmel,at91rm9200-gpio";
588 #gpio-cells = <2>;
589 gpio-controller;
590 interrupt-controller;
591 #interrupt-cells = <2>;
597 compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
600 pinctrl-names = "default";
601 pinctrl-0 = <&pinctrl_dbgu>;
603 clock-names = "usart";
608 compatible = "atmel,at91rm9200-usart";
611 atmel,use-dma-rx;
612 atmel,use-dma-tx;
613 pinctrl-names = "default";
614 pinctrl-0 = <&pinctrl_uart0>;
616 clock-names = "usart";
621 compatible = "atmel,at91rm9200-usart";
624 atmel,use-dma-rx;
625 atmel,use-dma-tx;
626 pinctrl-names = "default";
627 pinctrl-0 = <&pinctrl_uart1>;
629 clock-names = "usart";
634 compatible = "atmel,at91rm9200-usart";
637 atmel,use-dma-rx;
638 atmel,use-dma-tx;
639 pinctrl-names = "default";
640 pinctrl-0 = <&pinctrl_uart2>;
642 clock-names = "usart";
647 compatible = "atmel,at91rm9200-usart";
650 atmel,use-dma-rx;
651 atmel,use-dma-tx;
652 pinctrl-names = "default";
653 pinctrl-0 = <&pinctrl_uart3>;
655 clock-names = "usart";
660 compatible = "atmel,at91rm9200-udc";
664 clock-names = "pclk", "hclk";
669 #address-cells = <1>;
670 #size-cells = <0>;
671 compatible = "atmel,at91rm9200-spi";
674 pinctrl-names = "default";
675 pinctrl-0 = <&pinctrl_spi0>;
677 clock-names = "spi_clk";
683 compatible = "atmel,at91rm9200-nand";
684 #address-cells = <1>;
685 #size-cells = <1>;
687 atmel,nand-addr-offset = <21>;
688 atmel,nand-cmd-offset = <22>;
689 pinctrl-names = "default";
690 pinctrl-0 = <&pinctrl_nand>;
691 nand-ecc-mode = "soft";
700 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
704 clock-names = "ohci_clk", "hclk", "uhpck";
709 i2c-gpio-0 {
710 compatible = "i2c-gpio";
711 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
714 i2c-gpio,sda-open-drain;
715 i2c-gpio,scl-open-drain;
716 i2c-gpio,delay-us = <2>; /* ~100 kHz */
717 pinctrl-names = "default";
718 pinctrl-0 = <&pinctrl_twi_gpio>;
719 #address-cells = <1>;
720 #size-cells = <0>;