Lines Matching +full:0 +full:x4c
64 reg = <0x80000000 0x20000000>;
74 reg = <0x98000000 0x04000000>; /* 64M */
78 size = <0x01000000>;
79 alignment = <0x01000000>;
85 size = <0x02000000>;
86 alignment = <0x01000000>;
115 gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
116 linux,code = <ASPEED_GPIO(Z, 0)>;
172 gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
191 gpios = <&pca9552 0 GPIO_ACTIVE_LOW>;
228 #size-cells = <0>;
234 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
239 io-channels = <&adc 0>;
321 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
325 fan@0 {
326 reg = <0x00>;
327 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
331 reg = <0x01>;
332 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
336 reg = <0x02>;
337 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
341 reg = <0x03>;
342 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
346 reg = <0x04>;
347 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
351 reg = <0x05>;
352 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
356 reg = <0x00>;
357 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
361 reg = <0x01>;
362 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
366 reg = <0x02>;
367 aspeed,fan-tach-ch = /bits/ 8 <0x08>;
371 reg = <0x03>;
372 aspeed,fan-tach-ch = /bits/ 8 <0x09>;
376 reg = <0x04>;
377 aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
381 reg = <0x05>;
382 aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
388 flash@0 {
397 u-boot@0 {
398 reg = < 0 0x60000 >;
402 reg = < 0x60000 0x20000 >;
406 reg = < 0x80000 0x1F80000 >;
420 u-boot@0 {
421 reg = < 0 0x60000 >;
425 reg = < 0x60000 0x20000 >;
429 reg = < 0x80000 0x1F80000 >;
439 pinctrl-0 = <&pinctrl_spi1_default>;
441 flash@0 {
460 pinctrl-0 = <&pinctrl_txd1_default
475 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
486 pinctrl-0 = <&pinctrl_rmii1_default>;
497 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
526 * Power Supply 0
533 reg = <0x58>;
538 reg = <0x5b>;
543 reg = <0x60>;
545 #size-cells = <0>;
549 gpio@0 {
550 reg = <0>;
628 reg = <0x70>;
633 reg = <0x72>;
648 reg = <0x70>;
653 reg = <0x72>;
666 #size-cells = <0>;
667 reg = <0x70>;
669 bus7_mux223: i2c@0 {
671 #size-cells = <0>;
672 reg = <0>;
677 #size-cells = <0>;
683 #size-cells = <0>;
689 #size-cells = <0>;
695 #size-cells = <0>;
701 #size-cells = <0>;
707 #size-cells = <0>;
713 #size-cells = <0>;
728 #size-cells = <0>;
729 reg = <0x70>;
731 bus6_mux215: i2c@0 {
733 #size-cells = <0>;
734 reg = <0>;
739 #size-cells = <0>;
745 #size-cells = <0>;
751 #size-cells = <0>;
757 #size-cells = <0>;
763 #size-cells = <0>;
769 #size-cells = <0>;
775 #size-cells = <0>;
787 reg = <0x50>;
812 #size-cells = <0>;
813 reg = <0x70>;
819 bus9_mux231: i2c@0 {
821 #size-cells = <0>;
822 reg = <0>;
826 reg = <0x39>;
840 reg = <0x4c>;
846 #size-cells = <0>;
851 reg = <0x39>;
865 reg = <0x4c>;
871 #size-cells = <0>;
877 #size-cells = <0>;
885 #size-cells = <0>;
886 reg = <0x71>;
892 bus9_mux235: i2c@0 {
894 #size-cells = <0>;
895 reg = <0>;
899 reg = <0x39>;
913 reg = <0x4c>;
919 #size-cells = <0>;
924 reg = <0x39>;
938 reg = <0x4c>;
944 #size-cells = <0>;
950 #size-cells = <0>;
977 #size-cells = <0>;
978 reg = <0x70>;
984 bus10_mux239: i2c@0 {
986 #size-cells = <0>;
987 reg = <0>;
991 reg = <0x39>;
1005 reg = <0x4c>;
1011 #size-cells = <0>;
1016 reg = <0x39>;
1030 reg = <0x4c>;
1036 #size-cells = <0>;
1042 #size-cells = <0>;
1050 #size-cells = <0>;
1051 reg = <0x71>;
1057 bus10_mux243: i2c@0 {
1059 #size-cells = <0>;
1060 reg = <0>;
1064 reg = <0x39>;
1078 reg = <0x4c>;
1084 #size-cells = <0>;
1089 reg = <0x39>;
1103 reg = <0x4c>;
1109 #size-cells = <0>;
1115 #size-cells = <0>;
1133 reg = <0x57>;
1138 reg = <0x32>;
1143 reg = <0x48>;
1148 reg = <0x49>;
1154 reg = <0x4c>;
1172 #size-cells = <0>;
1173 reg = <0x70>;
1178 bus12_mux247: i2c@0 {
1180 #size-cells = <0>;
1181 reg = <0>;
1185 reg = <0x50>;
1191 #size-cells = <0>;
1196 reg = <0x50>;
1202 #size-cells = <0>;
1207 reg = <0x50>;
1213 #size-cells = <0>;
1218 reg = <0x48>;
1237 #size-cells = <0>;
1238 reg = <0x70>;
1239 bus13_mux251: i2c@0 {
1241 #size-cells = <0>;
1242 reg = <0>;
1247 #size-cells = <0>;
1253 #size-cells = <0>;
1259 #size-cells = <0>;
1265 #size-cells = <0>;
1271 #size-cells = <0>;
1277 #size-cells = <0>;
1283 #size-cells = <0>;
1301 pinctrl-0 = <&pinctrl_adc0_default
1326 pinctrl-0 = <&pinctrl_wdtrst1_default>;