Lines Matching +full:interrupt +full:- +full:map +full:- +full:mask
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
44 clock-latency = <1000000>;
49 compatible = "marvell,sheeva-v7";
52 clock-latency = <1000000>;
57 compatible = "marvell,sheeva-v7";
60 clock-latency = <1000000>;
71 compatible = "marvell,armada-xp-pcie";
75 #address-cells = <3>;
76 #size-cells = <2>;
78 msi-parent = <&mpic>;
79 bus-range = <0x00 0xff>;
118 assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
120 #address-cells = <3>;
121 #size-cells = <2>;
122 #interrupt-cells = <1>;
125 bus-range = <0x00 0xff>;
126 interrupt-map-mask = <0 0 0 0>;
127 interrupt-map = <0 0 0 0 &mpic 58>;
128 marvell,pcie-port = <0>;
129 marvell,pcie-lane = <0>;
136 assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
138 #address-cells = <3>;
139 #size-cells = <2>;
140 #interrupt-cells = <1>;
143 bus-range = <0x00 0xff>;
144 interrupt-map-mask = <0 0 0 0>;
145 interrupt-map = <0 0 0 0 &mpic 59>;
146 marvell,pcie-port = <0>;
147 marvell,pcie-lane = <1>;
154 assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
156 #address-cells = <3>;
157 #size-cells = <2>;
158 #interrupt-cells = <1>;
161 bus-range = <0x00 0xff>;
162 interrupt-map-mask = <0 0 0 0>;
163 interrupt-map = <0 0 0 0 &mpic 60>;
164 marvell,pcie-port = <0>;
165 marvell,pcie-lane = <2>;
172 assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
174 #address-cells = <3>;
175 #size-cells = <2>;
176 #interrupt-cells = <1>;
179 bus-range = <0x00 0xff>;
180 interrupt-map-mask = <0 0 0 0>;
181 interrupt-map = <0 0 0 0 &mpic 61>;
182 marvell,pcie-port = <0>;
183 marvell,pcie-lane = <3>;
190 assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
192 #address-cells = <3>;
193 #size-cells = <2>;
194 #interrupt-cells = <1>;
197 bus-range = <0x00 0xff>;
198 interrupt-map-mask = <0 0 0 0>;
199 interrupt-map = <0 0 0 0 &mpic 62>;
200 marvell,pcie-port = <1>;
201 marvell,pcie-lane = <0>;
208 assigned-addresses = <0x82003000 0 0x84000 0 0x2000>;
210 #address-cells = <3>;
211 #size-cells = <2>;
212 #interrupt-cells = <1>;
215 bus-range = <0x00 0xff>;
216 interrupt-map-mask = <0 0 0 0>;
217 interrupt-map = <0 0 0 0 &mpic 63>;
218 marvell,pcie-port = <1>;
219 marvell,pcie-lane = <1>;
226 assigned-addresses = <0x82003800 0 0x88000 0 0x2000>;
228 #address-cells = <3>;
229 #size-cells = <2>;
230 #interrupt-cells = <1>;
233 bus-range = <0x00 0xff>;
234 interrupt-map-mask = <0 0 0 0>;
235 interrupt-map = <0 0 0 0 &mpic 64>;
236 marvell,pcie-port = <1>;
237 marvell,pcie-lane = <2>;
244 assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>;
246 #address-cells = <3>;
247 #size-cells = <2>;
248 #interrupt-cells = <1>;
251 bus-range = <0x00 0xff>;
252 interrupt-map-mask = <0 0 0 0>;
253 interrupt-map = <0 0 0 0 &mpic 65>;
254 marvell,pcie-port = <1>;
255 marvell,pcie-lane = <3>;
262 assigned-addresses = <0x82004800 0 0x42000 0 0x2000>;
264 #address-cells = <3>;
265 #size-cells = <2>;
266 #interrupt-cells = <1>;
269 bus-range = <0x00 0xff>;
270 interrupt-map-mask = <0 0 0 0>;
271 interrupt-map = <0 0 0 0 &mpic 99>;
272 marvell,pcie-port = <2>;
273 marvell,pcie-lane = <0>;
280 assigned-addresses = <0x82005000 0 0x82000 0 0x2000>;
282 #address-cells = <3>;
283 #size-cells = <2>;
284 #interrupt-cells = <1>;
287 bus-range = <0x00 0xff>;
288 interrupt-map-mask = <0 0 0 0>;
289 interrupt-map = <0 0 0 0 &mpic 103>;
290 marvell,pcie-port = <3>;
291 marvell,pcie-lane = <0>;
297 internal-regs {
299 compatible = "marvell,armada-370-gpio",
300 "marvell,orion-gpio";
302 reg-names = "gpio", "pwm";
304 gpio-controller;
305 #gpio-cells = <2>;
306 #pwm-cells = <2>;
307 interrupt-controller;
308 #interrupt-cells = <2>;
314 compatible = "marvell,armada-370-gpio",
315 "marvell,orion-gpio";
317 reg-names = "gpio", "pwm";
319 gpio-controller;
320 #gpio-cells = <2>;
321 #pwm-cells = <2>;
322 interrupt-controller;
323 #interrupt-cells = <2>;
329 compatible = "marvell,armada-370-gpio",
330 "marvell,orion-gpio";
333 gpio-controller;
334 #gpio-cells = <2>;
335 interrupt-controller;
336 #interrupt-cells = <2>;
341 compatible = "marvell,armada-xp-neta";
352 compatible = "marvell,mv78460-pinctrl";