Lines Matching +full:interrupt +full:- +full:map +full:- +full:mask
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 enable-method = "marvell,armada-xp-smp";
31 compatible = "marvell,sheeva-v7";
34 clock-latency = <1000000>;
39 compatible = "marvell,sheeva-v7";
42 clock-latency = <1000000>;
53 compatible = "marvell,armada-xp-pcie";
57 #address-cells = <3>;
58 #size-cells = <2>;
60 msi-parent = <&mpic>;
61 bus-range = <0x00 0xff>;
82 assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
84 #address-cells = <3>;
85 #size-cells = <2>;
86 #interrupt-cells = <1>;
89 bus-range = <0x00 0xff>;
90 interrupt-map-mask = <0 0 0 0>;
91 interrupt-map = <0 0 0 0 &mpic 58>;
92 marvell,pcie-port = <0>;
93 marvell,pcie-lane = <0>;
100 assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
102 #address-cells = <3>;
103 #size-cells = <2>;
104 #interrupt-cells = <1>;
107 bus-range = <0x00 0xff>;
108 interrupt-map-mask = <0 0 0 0>;
109 interrupt-map = <0 0 0 0 &mpic 59>;
110 marvell,pcie-port = <0>;
111 marvell,pcie-lane = <1>;
118 assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
120 #address-cells = <3>;
121 #size-cells = <2>;
122 #interrupt-cells = <1>;
125 bus-range = <0x00 0xff>;
126 interrupt-map-mask = <0 0 0 0>;
127 interrupt-map = <0 0 0 0 &mpic 60>;
128 marvell,pcie-port = <0>;
129 marvell,pcie-lane = <2>;
136 assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
138 #address-cells = <3>;
139 #size-cells = <2>;
140 #interrupt-cells = <1>;
143 bus-range = <0x00 0xff>;
144 interrupt-map-mask = <0 0 0 0>;
145 interrupt-map = <0 0 0 0 &mpic 61>;
146 marvell,pcie-port = <0>;
147 marvell,pcie-lane = <3>;
154 assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
156 #address-cells = <3>;
157 #size-cells = <2>;
158 #interrupt-cells = <1>;
161 bus-range = <0x00 0xff>;
162 interrupt-map-mask = <0 0 0 0>;
163 interrupt-map = <0 0 0 0 &mpic 62>;
164 marvell,pcie-port = <1>;
165 marvell,pcie-lane = <0>;
171 internal-regs {
173 compatible = "marvell,armada-370-gpio",
174 "marvell,orion-gpio";
176 reg-names = "gpio", "pwm";
178 gpio-controller;
179 #gpio-cells = <2>;
180 #pwm-cells = <2>;
181 interrupt-controller;
182 #interrupt-cells = <2>;
188 compatible = "marvell,armada-370-gpio",
189 "marvell,orion-gpio";
191 reg-names = "gpio", "pwm";
193 gpio-controller;
194 #gpio-cells = <2>;
195 #pwm-cells = <2>;
196 interrupt-controller;
197 #interrupt-cells = <2>;
206 compatible = "marvell,mv78230-pinctrl";