Lines Matching +full:mv64xxx +full:- +full:i2c
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
33 enable-method = "marvell,armada-390-smp";
37 compatible = "arm,cortex-a9";
42 compatible = "arm,cortex-a9";
48 compatible = "arm,cortex-a9-pmu";
49 interrupts-extended = <&mpic 3>;
53 compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus",
54 "simple-bus";
55 #address-cells = <2>;
56 #size-cells = <1>;
58 interrupt-parent = <&gic>;
59 pcie-mem-aperture = <0xe0000000 0x8000000>;
60 pcie-io-aperture = <0xe8000000 0x100000>;
67 internal-regs {
68 compatible = "simple-bus";
69 #address-cells = <1>;
70 #size-cells = <1>;
73 L2: cache-controller@8000 {
74 compatible = "arm,pl310-cache";
76 cache-unified;
77 cache-level = <2>;
78 arm,double-linefill-incr = <0>;
79 arm,double-linefill-wrap = <0>;
80 arm,double-linefill = <0>;
81 prefetch-data = <1>;
85 compatible = "arm,cortex-a9-scu";
90 compatible = "arm,cortex-a9-twd-timer";
96 gic: interrupt-controller@d000 {
97 compatible = "arm,cortex-a9-gic";
98 #interrupt-cells = <3>;
99 #size-cells = <0>;
100 interrupt-controller;
105 i2c0: i2c@11000 {
106 compatible = "marvell,mv64xxx-i2c";
108 #address-cells = <1>;
109 #size-cells = <0>;
115 i2c1: i2c@11100 {
116 compatible = "marvell,mv64xxx-i2c";
118 #address-cells = <1>;
119 #size-cells = <0>;
125 i2c2: i2c@11200 {
126 compatible = "marvell,mv64xxx-i2c";
128 #address-cells = <1>;
129 #size-cells = <0>;
135 i2c3: i2c@11300 {
136 compatible = "marvell,mv64xxx-i2c";
138 #address-cells = <1>;
139 #size-cells = <0>;
146 compatible = "snps,dw-apb-uart";
148 reg-shift = <2>;
150 reg-io-width = <1>;
156 compatible = "snps,dw-apb-uart";
158 reg-shift = <2>;
160 reg-io-width = <1>;
166 compatible = "snps,dw-apb-uart";
168 reg-shift = <2>;
170 reg-io-width = <1>;
176 compatible = "snps,dw-apb-uart";
178 reg-shift = <2>;
180 reg-io-width = <1>;
186 i2c0_pins: i2c0-pins {
191 uart0_pins: uart0-pins {
196 uart1_pins: uart1-pins {
201 spi1_pins: spi1-pins {
206 nand_pins: nand-pins {
216 compatible = "marvell,orion-gpio";
219 gpio-controller;
220 #gpio-cells = <2>;
221 interrupt-controller;
222 #interrupt-cells = <2>;
230 compatible = "marvell,orion-gpio";
233 gpio-controller;
234 #gpio-cells = <2>;
235 interrupt-controller;
236 #interrupt-cells = <2>;
243 system-controller@18200 {
244 compatible = "marvell,armada-390-system-controller",
245 "marvell,armada-370-xp-system-controller";
249 gateclk: clock-gating-control@18220 {
250 compatible = "marvell,armada-390-gating-clock";
253 #clock-cells = <1>;
256 coreclk: mvebu-sar@18600 {
257 compatible = "marvell,armada-390-core-clock";
259 #clock-cells = <1>;
262 mbusc: mbus-controller@20000 {
263 compatible = "marvell,mbus-controller";
267 mpic: interrupt-controller@20a00 {
270 #interrupt-cells = <1>;
271 #size-cells = <1>;
272 interrupt-controller;
273 msi-controller;
278 compatible = "marvell,armada-380-timer",
279 "marvell,armada-xp-timer";
281 interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
288 clock-names = "nbclk", "fixed";
292 compatible = "marvell,armada-380-wdt";
296 clock-names = "nbclk", "fixed";
300 compatible = "marvell,armada-370-cpu-reset";
304 mpcore-soc-ctrl@20d20 {
305 compatible = "marvell,armada-380-mpcore-soc-ctrl";
309 coherency-fabric@21010 {
310 compatible = "marvell,armada-380-coherency-fabric";
315 compatible = "marvell,armada-390-pmsu",
316 "marvell,armada-380-pmsu";
321 compatible = "marvell,armada-380-xor", "marvell,orion-xor";
341 compatible = "marvell,armada-380-xor", "marvell,orion-xor";
361 compatible = "marvell,armada-380-rtc";
363 reg-names = "rtc", "rtc-soc";
367 nand_controller: nand-controller@d0000 {
368 compatible = "marvell,armada370-nand-controller";
370 #address-cells = <1>;
371 #size-cells = <0>;
378 compatible = "marvell,armada-380-sdhci";
379 reg-names = "sdhci", "mbus", "conf-sdio3";
385 mrvl,clk-delay-cycles = <0x1F>;
390 compatible = "marvell,armada-390-corediv-clock",
391 "marvell,armada-380-corediv-clock";
393 #clock-cells = <1>;
395 clock-output-names = "nand";
399 compatible = "marvell,armada380-thermal";
406 compatible = "marvell,armada-370-pcie";
410 #address-cells = <3>;
411 #size-cells = <2>;
413 msi-parent = <&mpic>;
414 bus-range = <0x00 0xff>;
437 assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
439 #address-cells = <3>;
440 #size-cells = <2>;
441 #interrupt-cells = <1>;
444 bus-range = <0x00 0xff>;
445 interrupt-map-mask = <0 0 0 0>;
446 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
447 marvell,pcie-port = <0>;
448 marvell,pcie-lane = <0>;
456 assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
458 #address-cells = <3>;
459 #size-cells = <2>;
460 #interrupt-cells = <1>;
463 bus-range = <0x00 0xff>;
464 interrupt-map-mask = <0 0 0 0>;
465 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
466 marvell,pcie-port = <1>;
467 marvell,pcie-lane = <0>;
475 assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
477 #address-cells = <3>;
478 #size-cells = <2>;
479 #interrupt-cells = <1>;
482 bus-range = <0x00 0xff>;
483 interrupt-map-mask = <0 0 0 0>;
484 interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
485 marvell,pcie-port = <2>;
486 marvell,pcie-lane = <0>;
497 assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
499 #address-cells = <3>;
500 #size-cells = <2>;
501 #interrupt-cells = <1>;
504 bus-range = <0x00 0xff>;
505 interrupt-map-mask = <0 0 0 0>;
506 interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
507 marvell,pcie-port = <3>;
508 marvell,pcie-lane = <0>;
515 compatible = "marvell,armada-390-spi",
516 "marvell,orion-spi";
518 #address-cells = <1>;
519 #size-cells = <0>;
520 cell-index = <0>;
527 compatible = "marvell,armada-390-spi",
528 "marvell,orion-spi";
530 #address-cells = <1>;
531 #size-cells = <0>;
532 cell-index = <1>;
542 compatible = "fixed-clock";
543 #clock-cells = <0>;
544 clock-frequency = <1000000000>;
549 compatible = "fixed-clock";
550 #clock-cells = <0>;
551 clock-frequency = <25000000>;