Lines Matching +full:0 +full:x800000
13 * internal registers to 0xf1000000 (instead of the default
14 * 0xd0000000). The 0xf1000000 is the default used by the recent,
17 * left internal registers mapped at 0xd0000000. If you are in this
33 memory@0 {
35 reg = <0x00000000 0x40000000>; /* 1 GB */
39 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
40 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
41 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
53 pinctrl-0 = <&ge0_rgmii_pins>;
60 pinctrl-0 = <&ge1_rgmii_pins>;
68 pinctrl-0 = <&i2c0_pins>;
73 #sound-dai-cells = <0>;
75 reg = <0x4a>;
80 pinctrl-0 = <&i2s_pins2>;
86 pinctrl-0 = <&sdio_pins1>;
125 simple-audio-card,dai-link@0 {
128 sound-dai = <&audio_controller 0>;
160 #sound-dai-cells = <0>;
165 #sound-dai-cells = <0>;
177 pcie@1,0 {
178 /* Port 0, Lane 0 */
182 pcie@2,0 {
183 /* Port 1, Lane 0 */
189 pinctrl-0 = <&mdio_pins>;
191 phy0: ethernet-phy@0 {
192 reg = <0>;
202 pinctrl-0 = <&spi0_pins2>;
206 spi-flash@0 {
210 reg = <0>; /* Chip select 0 */
218 nand@0 {
219 reg = <0>;
220 label = "pxa3xx_nand-0";
221 nand-rb = <0>;
230 partition@0 {
232 reg = <0 0x800000>;
236 reg = <0x800000 0x800000>;
240 reg = <0x1000000 0x3f000000>;