Lines Matching refs:p15
139 mrc p15, 0, \reg, c1, c0, 0 @ read SCTLR
143 mcr p15, 0, \reg, c1, c0, 0 @ write SCTLR
683 mrc p15, 0, \tmp, c0, c0, 1 @ read ctr
718 mcr p15, 0, r0, c6, c7, 0 @ PR7 Area Setting
719 mcr p15, 0, r0, c6, c7, 1
722 mcr p15, 0, r0, c2, c0, 0 @ D-cache on
723 mcr p15, 0, r0, c2, c0, 1 @ I-cache on
724 mcr p15, 0, r0, c3, c0, 0 @ write-buffer on
727 mcr p15, 0, r0, c5, c0, 1 @ I-access permission
728 mcr p15, 0, r0, c5, c0, 0 @ D-access permission
731 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
732 mcr p15, 0, r0, c7, c5, 0 @ flush(inval) I-Cache
733 mcr p15, 0, r0, c7, c6, 0 @ flush(inval) D-Cache
734 mrc p15, 0, r0, c1, c0, 0 @ read control reg
739 mcr p15, 0, r0, c1, c0, 0 @ write control reg
742 mcr p15, 0, r0, c7, c5, 0 @ flush(inval) I-Cache
743 mcr p15, 0, r0, c7, c6, 0 @ flush(inval) D-Cache
748 mcr p15, 0, r0, c6, c7, 0 @ PR7 Area Setting
751 mcr p15, 0, r0, c2, c0, 0 @ cache on
752 mcr p15, 0, r0, c3, c0, 0 @ write-buffer on
755 mcr p15, 0, r0, c5, c0, 0 @ access permission
758 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
763 mrc p15, 0, r0, c1, c0, 0 @ read control reg
768 mcr p15, 0, r0, c1, c0, 0 @ write control reg
771 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
824 mrc p15, 0, r0, c1, c0, 0 @ read SCTLR
827 mcr p15, 0, r0, c1, c0, 0 @ write SCTLR
833 mcr p15, 7, r0, c15, c0, 0
842 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
843 mcr p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
844 mrc p15, 0, r0, c1, c0, 0 @ read control reg
850 mcr p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
858 mrc p15, 0, r11, c0, c1, 4 @ read ID_MMFR0
863 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
865 mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
867 mrc p15, 0, r0, c1, c0, 0 @ read control reg
876 mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg
881 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
882 mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
883 mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
885 mcr p15, 0, r0, c7, c5, 4 @ ISB
886 mcr p15, 0, r0, c1, c0, 0 @ load control register
887 mrc p15, 0, r0, c1, c0, 0 @ and read it back
889 mcr p15, 0, r0, c7, c5, 4 @ ISB
897 mcr p15, 0, r0, c7, c7, 0 @ Invalidate whole cache
898 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
899 mcr p15, 0, r0, c8, c7, 0 @ flush UTLB
900 mrc p15, 0, r0, c1, c0, 0 @ read control reg
904 mcr p15, 0, r0, c8, c7, 0 @ flush UTLB
913 mcr p15, 0, r3, c2, c0, 0 @ load page table pointer
914 mcr p15, 0, r1, c3, c0, 0 @ load domain access control
917 1: mcr p15, 0, r0, c1, c0, 0 @ load control register
918 mrc p15, 0, r0, c1, c0, 0 @ and read it back to
940 mrc p15, 0, r9, c0, c0 @ get processor ID
1147 mrc p15, 0, r0, c1, c0
1149 mcr p15, 0, r0, c1, c0 @ turn MPU and cache off
1151 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
1152 mcr p15, 0, r0, c7, c6, 0 @ flush D-Cache
1153 mcr p15, 0, r0, c7, c5, 0 @ flush I-Cache
1157 mrc p15, 0, r0, c1, c0
1159 mcr p15, 0, r0, c1, c0, 0 @ turn MPU and cache off
1161 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
1166 mrc p15, 0, r0, c1, c0
1168 mcr p15, 0, r0, c1, c0 @ turn MMU and cache off
1170 mcr p15, 0, r0, c7, c7 @ invalidate whole cache v4
1171 mcr p15, 0, r0, c8, c7 @ invalidate whole TLB v4
1176 mrc p15, 0, r0, c1, c0
1182 mcr p15, 0, r0, c1, c0 @ turn MMU and cache off
1185 mcr p15, 0, r0, c8, c7, 0 @ invalidate whole TLB
1187 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTC
1188 mcr p15, 0, r0, c7, c10, 4 @ DSB
1189 mcr p15, 0, r0, c7, c5, 4 @ ISB
1214 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
1217 2: mcr p15, 0, r3, c7, c14, 2 @ clean & invalidate D index
1224 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
1225 mcr p15, 0, ip, c7, c10, 4 @ drain WB
1232 mcr p15, 0, r1, c7, c14, 0 @ clean and invalidate D cache
1233 mcr p15, 0, r1, c7, c5, 0 @ flush I cache
1234 mcr p15, 0, r1, c7, c10, 4 @ drain WB
1240 mcreq p15, 0, r1, c7, c14, 0 @ clean+invalidate D
1241 mcr p15, 0, r1, c7, c5, 0 @ invalidate I+BTB
1242 mcreq p15, 0, r1, c7, c15, 0 @ clean+invalidate unified
1243 mcr p15, 0, r1, c7, c10, 4 @ drain WB
1250 mrc p15, 0, r10, c0, c1, 5 @ read ID_MMFR1
1254 mcr p15, 0, r10, c7, c14, 0 @ clean+invalidate D
1264 mcr p15, 0, r0, c7, c14, 1 @ Dcache clean/invalidate by VA
1268 mcr p15, 0, r10, c7, c10, 4 @ DSB
1269 mcr p15, 0, r10, c7, c5, 0 @ invalidate I+BTB
1270 mcr p15, 0, r10, c7, c10, 4 @ DSB
1271 mcr p15, 0, r10, c7, c5, 4 @ ISB
1277 1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test,clean,invalidate D cache
1279 mcr p15, 0, r0, c7, c5, 0 @ flush I cache
1280 mcr p15, 0, r0, c7, c10, 4 @ drain WB
1288 mrc p15, 0, r3, c0, c0, 1 @ read cache type
1312 mcr p15, 0, r1, c7, c5, 0 @ flush I cache
1313 mcr p15, 0, r1, c7, c6, 0 @ flush D cache
1314 mcr p15, 0, r1, c7, c10, 4 @ drain WB
1322 mcr p15, 0, r1, c7, c0, 0 @ invalidate whole cache v3
1433 mrc p15, 4, r0, c1, c0, 0 @ read HSCTLR
1435 mcr p15, 4, r0, c1, c0, 0 @ write HSCTLR
1464 mrc p15, 4, r1, c1, c0, 0 @ read HSCTLR