Lines Matching full:way
62 * ARC700 MMU-v1 had a Joint-TLB for Code and Data and is 2 way set-assoc.
67 * Although J-TLB is 2 way set assoc, ARC700 caches J-TLB into uTLBS which has
275 * Flush the entire MM for userland. The fastest way is to move to Next ASID
304 * -Here the fastest way (if range is too large) is to move to next ASID
874 #define SET_WAY_TO_IDX(mmu, set, way) ((set) * mmu->ways + (way)) argument
901 int is_valid, way; in do_tlb_overlap_fault() local
905 for (way = 0, is_valid = 0; way < n_ways; way++) { in do_tlb_overlap_fault()
907 SET_WAY_TO_IDX(mmu, set, way)); in do_tlb_overlap_fault()
909 pd0[way] = read_aux_reg(ARC_REG_TLBPD0); in do_tlb_overlap_fault()
910 is_valid |= pd0[way] & _PAGE_PRESENT; in do_tlb_overlap_fault()
911 pd0[way] &= PAGE_MASK; in do_tlb_overlap_fault()
919 for (way = 0; way < n_ways - 1; way++) { in do_tlb_overlap_fault()
923 if (!pd0[way]) in do_tlb_overlap_fault()
926 for (n = way + 1; n < n_ways; n++) { in do_tlb_overlap_fault()
927 if (pd0[way] != pd0[n]) in do_tlb_overlap_fault()
932 pd0[way], set, way, n); in do_tlb_overlap_fault()
935 * clear entry @way and not @n. in do_tlb_overlap_fault()
938 pd0[way] = 0; in do_tlb_overlap_fault()
940 SET_WAY_TO_IDX(mmu, set, way)); in do_tlb_overlap_fault()