Lines Matching +full:pre +full:- +full:delay

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
5  * Delay routines using pre computed loops_per_jiffy value.
8  *  -Rewrote in "C" to avoid dealing with availability of H/w MPY
9  *  -Also reduced the num of MPY operations from 3 to 2
17 #include <asm-generic/types.h>
38  *  -we have precomputed @loops_per_jiffy
39  *  -1 sec has HZ jiffies
43  *  -Mathematically if we multiply and divide a number by same value the
45  *  -> (loops_per_N_usec * 2^32 ) / 2^32
46  *  -> (((loops_per_jiffy * HZ / 1000000) * N) * 2^32) / 2^32
47  *  -> (loops_per_jiffy * HZ * N * 4295) / 2^32
49  *  -Divide by 2^32 is very simply right shift by 32
50  *  -We simply need to ensure that the multiply per above eqn happens in
51  *   64-bit precision (if CPU doesn't support it - gcc can emaulate it)
58 	/* (u64) cast ensures 64 bit MPY - real or emulated  in __udelay()
59 	 * HZ * 4295 is pre-evaluated by gcc - hence only 2 mpy ops  in __udelay()