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107 scheme where individual function BARs can be "grouped" to fit in one or
127 for large BARs in 64-bit space:
156 PE" mode to overlay over specific BARs to work around some of that, for
157 example for devices with very large BARs, e.g., GPUs. It would make
170 PCI devices, but the BARs in VF config space headers are unusual. For
171 a non-VF device, software uses BARs in the config space header to
174 discover sizes and assign addresses. The BARs in the VF's config space
178 base address for all the corresponding VF(n) BARs. For example, if the
190 window with 1MB segments. VF BARs that are 1MB or larger could be
193 flexible, but it works best when all the VF BARs are the same size. If
196 BARs span several segments.
204 flexibility. A VF with multiple BARs would have to be in a "domain" of
227 SR-IOV VF BARs are all the same size.
303 Then each VF will be in its own PE. The VF BARs (and therefore the PE#s)