Lines Matching +full:led +full:- +full:7

5 Provide system LED support for the nex Mellanox systems:
10 -----------
14   - mlxcpld:fan1:green
15   - mlxcpld:fan1:red
16   - mlxcpld:fan2:green
17   - mlxcpld:fan2:red
18   - mlxcpld:fan3:green
19   - mlxcpld:fan3:red
20   - mlxcpld:fan4:green
21   - mlxcpld:fan4:red
22   - mlxcpld:psu:green
23   - mlxcpld:psu:red
24   - mlxcpld:status:green
25   - mlxcpld:status:red
28   - CPLD reg offset: 0x20
29   - Bits [3:0]
32   - CPLD reg offset: 0x20
33   - Bits [7:4]
36   - CPLD reg offset: 0x21
37   - Bits [3:0]
40   - CPLD reg offset: 0x21
41   - Bits [7:4]
44   - CPLD reg offset: 0x22
45   - Bits [3:0]
48   - CPLD reg offset: 0x22
49   - Bits [7:4]
56 	- [0,0,0,0] = LED OFF
57 	- [0,1,0,1] = Red static ON
58 	- [1,1,0,1] = Green static ON
59 	- [0,1,1,0] = Red blink 3Hz
60 	- [1,1,1,0] = Green blink 3Hz
61 	- [0,1,1,1] = Red blink 6Hz
62 	- [1,1,1,1] = Green blink 6Hz
66   - mlxcpld:fan:green
67   - mlxcpld:fan:red
68   - mlxcpld:psu1:green
69   - mlxcpld:psu1:red
70   - mlxcpld:psu2:green
71   - mlxcpld:psu2:red
72   - mlxcpld:status:green
73   - mlxcpld:status:red
74   - mlxcpld:uid:blue
77   - CPLD reg offset: 0x20
78   - Bits [3:0]
81   - CPLD reg offset: 0x21
82   - Bits [3:0]
85   - CPLD reg offset: 0x23
86   - Bits [3:0]
89   - CPLD reg offset: 0x23
90   - Bits [7:4]
93   - CPLD reg offset: 0x24
94   - Bits [3:0]
101 	- [0,0,0,0] = LED OFF
102 	- [0,1,0,1] = Red static ON
103 	- [1,1,0,1] = Green static ON
104 	- [0,1,1,0] = Red blink 3Hz
105 	- [1,1,1,0] = Green blink 3Hz
106 	- [0,1,1,1] = Red blink 6Hz
107 	- [1,1,1,1] = Green blink 6Hz
109  Color mask for uid LED:
112 	- [0,0,0,0] = LED OFF
113 	- [1,1,0,1] = Blue static ON
114 	- [1,1,1,0] = Blue blink 3Hz
115 	- [1,1,1,1] = Blue blink 6Hz