Lines Matching +full:multi +full:- +full:functional
1 .. SPDX-License-Identifier: GPL-2.0
8 ------------
12 latency and priority between multiple interconnected devices or functional
19 components or functional blocks in chipsets. There can be multiple interconnects
20 on an SoC that can be multi-tiered.
22 Below is a simplified diagram of a real-world SoC interconnect bus topology.
26 +----------------+ +----------------+
27 | HW Accelerator |--->| M NoC |<---------------+
28 +----------------+ +----------------+ |
29 | | +------------+
30 +-----+ +-------------+ V +------+ | |
31 | DDR | | +--------+ | PCIe | | |
32 +-----+ | | Slaves | +------+ | |
33 ^ ^ | +--------+ | | C NoC |
35 +------------------+ +------------------------+ | | +-----+
36 | |-->| |-->| |-->| CPU |
37 | |-->| |<--| | +-----+
38 | Mem NoC | | S NoC | +------------+
39 | |<--| |---------+ |
40 | |<--| |<------+ | | +--------+
41 +------------------+ +------------------------+ | | +-->| Slaves |
42 ^ ^ ^ ^ ^ | | +--------+
44 +------+ | +-----+ +-----+ +---------+ +----------------+ +--------+
45 | CPUs | | | GPU | | DSP | | Masters |-->| P NoC |-->| Slaves |
46 +------+ | +-----+ +-----+ +---------+ +----------------+ +--------+
48 +-------+
50 +-------+
53 -----------
70 include multiple master-slave pairs across several interconnect providers.
79 ----------------------
85 .. kernel-doc:: include/linux/interconnect-provider.h
88 ----------------------
96 -------------------------------
111 same provider as subgraphs. The format is human-readable and can also be piped
115 dot -Tsvg > interconnect_graph.svg