Lines Matching +full:regulator +full:- +full:max +full:- +full:microamp

3 UFSHC nodes are defined to describe on-chip UFS host controllers.
7 - compatible		: must contain "jedec,ufs-1.1" or "jedec,ufs-2.0"
10 			  SoC-specific compatible along with "qcom,ufshc" and
12 			    "qcom,msm8994-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
13 			    "qcom,msm8996-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
14 			    "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
15 			    "qcom,sdm845-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
16 			    "qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
17 - interrupts        : <interrupt mapping for UFS host controller IRQ>
18 - reg               : <registers mapping>
21 - phys                  : phandle to UFS PHY node
22 - phy-names             : the string "ufsphy" when is found in a node, along
24 - vdd-hba-supply        : phandle to UFS host controller supply regulator node
25 - vcc-supply            : phandle to VCC supply regulator node
26 - vccq-supply           : phandle to VCCQ supply regulator node
27 - vccq2-supply          : phandle to VCCQ2 supply regulator node
28 - vcc-supply-1p8        : For embedded UFS devices, valid VCC range is 1.7-1.95V
29                           or 2.7-3.6V. This boolean property when set, specifies
30 			  to use low voltage range of 1.7-1.95V. Note for external
32 			  always 2.7-3.6V.
33 - vcc-max-microamp      : specifies max. load that can be drawn from vcc supply
34 - vccq-max-microamp     : specifies max. load that can be drawn from vccq supply
35 - vccq2-max-microamp    : specifies max. load that can be drawn from vccq2 supply
37 - clocks                : List of phandle and clock specifier pairs
38 - clock-names           : List of clock input name strings sorted in the same
46 - freq-table-hz		: Array of <min max> operating frequencies stored in the same
51 -lanes-per-direction	: number of lanes available per direction - either 1 or 2.
54 - #reset-cells		: Must be <1> for Qualcomm UFS controllers that expose
56 - resets            : reset node register
57 - reset-names       : describe reset node register, the "rst" corresponds to reset the whole UFS IP.
58 - reset-gpios       : A phandle and gpio specifier denoting the GPIO connected
66 		compatible = "jedec,ufs-1.1";
70 		vdd-hba-supply = <&xxx_reg0>;
71 		vcc-supply = <&xxx_reg1>;
72 		vcc-supply-1p8;
73 		vccq-supply = <&xxx_reg2>;
74 		vccq2-supply = <&xxx_reg3>;
75 		vcc-max-microamp = 500000;
76 		vccq-max-microamp = 200000;
77 		vccq2-max-microamp = 200000;
80 		clock-names = "core_clk", "ref_clk", "phy_clk", "iface_clk";
81 		freq-table-hz = <100000000 200000000>, <0 0>, <0 0>, <0 0>;
83 		reset-names = "rst";
85 		phy-names = "ufsphy";
86 		#reset-cells = <1>;