Lines Matching +full:rk3066 +full:- +full:smp
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic on-chip SRAM
10 - Rob Herring <robh@kernel.org>
19 Following the generic-names recommended practice, node names should
30 - mmio-sram
31 - atmel,sama5d2-securam
32 - rockchip,rk3288-pmu-sram
42 "#address-cells":
45 "#size-cells":
52 no-memory-wc:
59 "^([a-z]*-)?sram(-section)?@[a-f0-9]+$":
67 <vendor>,[<device>-]<usage>
70 - allwinner,sun4i-a10-sram-a3-a4
71 - allwinner,sun4i-a10-sram-c1
72 - allwinner,sun4i-a10-sram-d
73 - allwinner,sun9i-a80-smp-sram
74 - allwinner,sun50i-a64-sram-c
75 - amlogic,meson8-smp-sram
76 - amlogic,meson8b-smp-sram
77 - amlogic,meson-gxbb-scp-shmem
78 - amlogic,meson-axg-scp-shmem
79 - renesas,smp-sram
80 - rockchip,rk3066-smp-sram
81 - samsung,exynos4210-sysram
82 - samsung,exynos4210-sysram-ns
83 - socionext,milbeaut-smp-sram
102 protect-exec:
106 read-only, executable during code execution. NOTE: This region must
117 - reg
122 - compatible
123 - reg
129 const: rockchip,rk3288-pmu-sram
133 - "#address-cells"
134 - "#size-cells"
135 - ranges
140 - |
142 compatible = "mmio-sram";
145 #address-cells = <1>;
146 #size-cells = <1>;
149 smp-sram@100 {
153 device-sram@1000 {
158 exported-sram@20000 {
164 - |
165 // Samsung SMP-capable Exynos SoCs use part of the SYSRAM for the bringup
169 // Therefore reserved section sub-nodes have to be added to the mmio-sram
171 // non-secure execution environment.
173 compatible = "mmio-sram";
175 #address-cells = <1>;
176 #size-cells = <1>;
179 smp-sram@0 {
180 compatible = "samsung,exynos4210-sysram";
184 smp-sram@53000 {
185 compatible = "samsung,exynos4210-sysram-ns";
190 - |
191 // Amlogic's SMP-capable SoCs use part of the sram for the bringup of the cores.
195 // Therefore a reserved section sub-node has to be added to the mmio-sram
198 compatible = "mmio-sram";
200 #address-cells = <1>;
201 #size-cells = <1>;
204 smp-sram@1ff80 {
205 compatible = "amlogic,meson8b-smp-sram";
210 - |
212 compatible = "mmio-sram";
214 #address-cells = <1>;
215 #size-cells = <1>;
218 smp-sram@0 {
219 compatible = "renesas,smp-sram";
224 - |
226 compatible = "mmio-sram";
228 #address-cells = <1>;
229 #size-cells = <1>;
232 smp-sram@10080000 {
233 compatible = "rockchip,rk3066-smp-sram";
238 - |
241 // the "pmu-sram" because it keeps power even in low power states
244 compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
248 - |
254 // Also there are no "secure-only" properties. The implementation should
258 compatible = "mmio-sram";
260 #address-cells = <1>;
261 #size-cells = <1>;
264 smp-sram@1000 {
266 // cpu0 should jump to SMP entry vector
267 compatible = "allwinner,sun9i-a80-smp-sram";
272 - |
274 compatible = "mmio-sram";
276 #address-cells = <1>;
277 #size-cells = <1>;
280 smp-sram@f100 {
281 compatible = "socionext,milbeaut-smp-sram";