Lines Matching +full:separately +full:- +full:defined
10 - compatible : Compatible list, contains "fsl,vf610-sai",
11 "fsl,imx6sx-sai", "fsl,imx6ul-sai",
12 "fsl,imx7ulp-sai", "fsl,imx8mq-sai" or
13 "fsl,imx8qm-sai".
15 - reg : Offset and length of the register set for the device.
17 - clocks : Must contain an entry for each entry in clock-names.
19 - clock-names : Must include the "bus" for register access and
22 - dmas : Generic dma devicetree binding as described in
25 - dma-names : Two dmas have to be defined, "tx" and "rx".
27 - pinctrl-names : Must contain a "default" entry.
29 - pinctrl-NNN : One property must exist for each entry in
30 pinctrl-names. See ../pinctrl/pinctrl-bindings.txt
33 - lsb-first : Configures whether the LSB or the MSB is transmitted
38 - fsl,sai-synchronous-rx: This is a boolean property. If present, indicating
44 - fsl,sai-asynchronous: This is a boolean property. If present, indicating
48 frame sync clocks separately.
52 - big-endian : Boolean property, required if all the SAI
53 registers are big-endian rather than little-endian.
57 - fsl,sai-mclk-direction-output: This is a boolean property. If present,
61 - If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
65 - fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive.
69 compatible = "fsl,vf610-sai";
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_sai2_1>;
76 clock-names = "bus", "mclk1", "mclk2", "mclk3";
77 dma-names = "tx", "rx";
80 big-endian;
81 lsb-first;