Lines Matching +full:reset +full:- +full:gpio
7 - compatible: "cirrus,cs4271"
10 Documentation/devicetree/bindings/spi/spi-bus.txt
14 - reg: the i2c address
19 - reset-gpio: a GPIO spec to define which pin is connected to the chip's
20 !RESET pin
21 - cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag
23 - cirrus,enable-soft-reset:
24 The CS4271 requires its LRCLK and MCLK to be stable before its RESET
25 line is de-asserted. That also means that clocks cannot be changed
26 without putting the chip back into hardware reset, which also requires
27 a complete re-initialization of all registers.
29 One (undocumented) workaround is to assert and de-assert the PDN bit
36 - vd-supply: Digital power
37 - vl-supply: Logic power
38 - va-supply: Analog Power
45 reset-gpio = <&gpio 23 0>;
46 vd-supply = <&vdd_3v3_reg>;
47 vl-supply = <&vdd_3v3_reg>;
48 va-supply = <&vdd_3v3_reg>;
54 reset-gpio = <&gpio 23 0>;
55 spi-max-frequency = <6000000>;