Lines Matching +full:pruss +full:- +full:intc
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/ti,pruss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
25 - an Ethernet MII_RT module with two MII ports
26 - an MDIO port to control external Ethernet PHYs
27 - an Industrial Ethernet Peripheral (IEP) to manage/generate Industrial
29 - an Enhanced Capture Module (eCAP)
30 - an Industrial Ethernet Timer with 7/9 capture and 16 compare events
31 - a 16550-compatible UART to support PROFIBUS
32 - Enhanced GPIO with async capture and serial support
34 A PRU-ICSS subsystem can have up to three shared data memories. A PRU core
38 by both the PRU cores. The Interrupt Controller (INTC) and a CFG module are
42 Various sub-modules within a PRU-ICSS subsystem are represented as individual
43 nodes and are defined using a parent-child hierarchy depending on their
48 PRU-ICSS Node
50 Each PRU-ICSS instance is represented as its own node with the individual PRU
51 processor cores, the memories node, an INTC node and an MDIO node represented
52 as child nodes within this PRUSS node. This node shall be a child of the
53 corresponding interconnect bus nodes or target-module nodes.
60 pattern: "^(pruss|icssg)@[0-9a-f]+$"
64 - ti,am3356-pruss # for AM335x SoC family
65 - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0
66 - ti,am4376-pruss1 # for AM437x SoC family and PRUSS unit 1
67 - ti,am5728-pruss # for AM57xx SoC family
68 - ti,k2g-pruss # for 66AK2G SoC family
69 - ti,am654-icssg # for K3 AM65x SoC family
70 - ti,j721e-icssg # for K3 J721E SoC family
75 "#address-cells":
78 "#size-cells":
84 power-domains:
86 This property is as per sci-pm-domain.txt.
90 memories@[a-f0-9]+$:
92 The various Data RAMs within a single PRU-ICSS unit are represented as a
99 minItems: 2 # On AM437x one of two PRUSS units don't contain Shared RAM.
102 - description: Address and size of the Data RAM0.
103 - description: Address and size of the Data RAM1.
104 - description: |
106 of two PRUSS units don't contain Shared RAM, while the second one
109 reg-names:
113 - const: dram0
114 - const: dram1
115 - const: shrdram2
118 - reg
119 - reg-names
123 cfg@[a-f0-9]+$:
125 PRU-ICSS configuration space. CFG sub-module represented as a SysCon.
132 - const: ti,pruss-cfg
133 - const: syscon
135 "#address-cells":
138 "#size-cells":
151 "#address-cells":
154 "#size-cells":
158 coreclk-mux@[a-f0-9]+$:
163 name "coreclk-mux".
168 '#clock-cells':
173 - description: ICSSG_CORE Clock
174 - description: ICSSG_ICLK Clock
176 assigned-clocks:
179 assigned-clock-parents:
182 Standard assigned-clocks-parents definition used for selecting
189 - clocks
193 iepclk-mux@[a-f0-9]+$:
197 mux and should have the name "iepclk-mux".
202 '#clock-cells':
207 - description: ICSSG_IEP Clock
208 - description: Core Clock (OCP Clock in older SoCs)
210 assigned-clocks:
213 assigned-clock-parents:
216 Standard assigned-clocks-parents definition used for selecting
223 - clocks
229 iep@[a-f0-9]+$:
232 functions such as time stamping. Each PRUSS has either 1 IEP (on AM335x,
238 mii-rt@[a-f0-9]+$:
240 Real-Time Ethernet to support multiple industrial communication protocols.
241 MII-RT sub-module represented as a SysCon.
248 - const: ti,pruss-mii
249 - const: syscon
256 mii-g-rt@[a-f0-9]+$:
258 The Real-time Media Independent Interface to support multiple industrial
259 communication protocols (G stands for Gigabit). MII-G-RT sub-module
267 - const: ti,pruss-mii-g
268 - const: syscon
275 interrupt-controller@[a-f0-9]+$:
277 PRUSS INTC Node. Each PRUSS has a single interrupt controller instance
279 interrupt-controller node.
283 mdio@[a-f0-9]+$:
285 MDIO Node. Each PRUSS has an MDIO module that can be used to control
286 external PHYs. The MDIO module used within the PRU-ICSS is an instance of
290 - $ref: /schemas/net/ti,davinci-mdio.yaml#
294 "^(pru|rtu|txpru)@[0-9a-f]+$":
296 PRU Node. Each PRUSS has dual PRU cores, each represented as a RemoteProc
305 - compatible
306 - reg
307 - ranges
311 # Due to inability of correctly verifying sub-nodes with an @address through
312 # the "required" list, the required sub-nodes below are commented out for now.
315 # - memories
316 # - interrupt-controller
317 # - pru
324 - ti,k2g-pruss
325 - ti,am654-icssg
326 - ti,j721e-icssg
329 - power-domains
332 - |
334 /* Example 1 AM33xx PRU-ICSS */
335 pruss: pruss@0 {
336 compatible = "ti,am3356-pruss";
338 #address-cells = <1>;
339 #size-cells = <1>;
346 reg-names = "dram0", "dram1", "shrdram2";
350 compatible = "ti,pruss-cfg", "syscon";
351 #address-cells = <1>;
352 #size-cells = <1>;
357 #address-cells = <1>;
358 #size-cells = <0>;
360 pruss_iepclk_mux: iepclk-mux@30 {
362 #clock-cells = <0>;
369 pruss_mii_rt: mii-rt@32000 {
370 compatible = "ti,pruss-mii", "syscon";
378 clock-names = "fck";
380 #address-cells = <1>;
381 #size-cells = <0>;
385 - |
387 /* Example 2 AM43xx PRU-ICSS with PRUSS1 node */
388 #include <dt-bindings/interrupt-controller/arm-gic.h>
389 pruss1: pruss@0 {
390 compatible = "ti,am4376-pruss1";
392 #address-cells = <1>;
393 #size-cells = <1>;
400 reg-names = "dram0", "dram1", "shrdram2";
404 compatible = "ti,pruss-cfg", "syscon";
405 #address-cells = <1>;
406 #size-cells = <1>;
411 #address-cells = <1>;
412 #size-cells = <0>;
414 pruss1_iepclk_mux: iepclk-mux@30 {
416 #clock-cells = <0>;
423 pruss1_mii_rt: mii-rt@32000 {
424 compatible = "ti,pruss-mii", "syscon";
432 clock-names = "fck";
434 #address-cells = <1>;
435 #size-cells = <0>;