Lines Matching +full:1 +full:- +full:based
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Mukesh Savaliya <msavaliy@codeaurora.org>
11 - Akash Asthana <akashast@codeaurora.org>
14 Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) wrapper
24 - qcom,geni-se-qup
28 maxItems: 1
30 clock-names:
32 - const: m-ahb
33 - const: s-ahb
37 - description: Master AHB Clock
38 - description: Slave AHB Clock
40 "#address-cells":
43 "#size-cells":
49 maxItems: 1
51 interconnect-names:
52 const: qup-core
55 - compatible
56 - reg
57 - clock-names
58 - clocks
59 - "#address-cells"
60 - "#size-cells"
61 - ranges
64 "^.*@[0-9a-f]+$":
66 description: Common properties for GENI Serial Engine based I2C, SPI and
72 maxItems: 1
74 clock-names:
79 maxItems: 1
85 interconnect-names:
88 - const: qup-core
89 - const: qup-config
90 - const: qup-memory
93 - reg
94 - clock-names
95 - clocks
97 "spi@[0-9a-f]+$":
99 description: GENI serial engine based SPI controller. SPI in master mode
103 $ref: /spi/spi-controller.yaml#
108 - qcom,geni-spi
111 maxItems: 1
113 "#address-cells":
114 const: 1
116 "#size-cells":
120 - compatible
121 - interrupts
122 - "#address-cells"
123 - "#size-cells"
125 "i2c@[0-9a-f]+$":
127 description: GENI serial engine based I2C controller.
128 $ref: /schemas/i2c/i2c-controller.yaml#
133 - qcom,geni-i2c
136 maxItems: 1
138 "#address-cells":
139 const: 1
141 "#size-cells":
144 clock-frequency:
149 - compatible
150 - interrupts
151 - "#address-cells"
152 - "#size-cells"
154 "serial@[0-9a-f]+$":
156 description: GENI Serial Engine based UART Controller.
162 - qcom,geni-uart
163 - qcom,geni-debug-uart
166 minItems: 1
169 - description: UART core irq
170 - description: Wakeup irq (RX GPIO)
173 - compatible
174 - interrupts
179 - |
180 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
181 #include <dt-bindings/interrupt-controller/arm-gic.h>
184 #address-cells = <2>;
185 #size-cells = <2>;
188 compatible = "qcom,geni-se-qup";
190 clock-names = "m-ahb", "s-ahb";
193 #address-cells = <2>;
194 #size-cells = <2>;
198 compatible = "qcom,geni-i2c";
201 clock-names = "se";
203 pinctrl-names = "default", "sleep";
204 pinctrl-0 = <&qup_1_i2c_5_active>;
205 pinctrl-1 = <&qup_1_i2c_5_sleep>;
206 #address-cells = <1>;
207 #size-cells = <0>;
211 compatible = "qcom,geni-uart";
214 clock-names = "se";
216 pinctrl-names = "default", "sleep";
217 pinctrl-0 = <&qup_1_uart_3_active>;
218 pinctrl-1 = <&qup_1_uart_3_sleep>;