Lines Matching +full:soc +full:- +full:glue
7 ---------------
9 This regulator controls VBUS and belongs to USB3 glue layer. Before using
14 - compatible: Should be
15 "socionext,uniphier-pro4-usb3-regulator" - for Pro4 SoC
16 "socionext,uniphier-pro5-usb3-regulator" - for Pro5 SoC
17 "socionext,uniphier-pxs2-usb3-regulator" - for PXs2 SoC
18 "socionext,uniphier-ld20-usb3-regulator" - for LD20 SoC
19 "socionext,uniphier-pxs3-usb3-regulator" - for PXs3 SoC
20 - reg: Specifies offset and length of the register set for the device.
21 - clocks: A list of phandles to the clock gate for USB3 glue layer.
22 According to the clock-names, appropriate clocks are required.
23 - clock-names: Should contain
24 "gio", "link" - for Pro4 and Pro5 SoCs
25 "link" - for others
26 - resets: A list of phandles to the reset control for USB3 glue layer.
27 According to the reset-names, appropriate resets are required.
28 - reset-names: Should contain
29 "gio", "link" - for Pro4 and Pro5 SoCs
30 "link" - for others
37 usb-glue@65b00000 {
38 compatible = "socionext,uniphier-ld20-dwc3-glue",
39 "simple-mfd";
40 #address-cells = <1>;
41 #size-cells = <1>;
45 compatible = "socionext,uniphier-ld20-usb3-regulator";
47 clock-names = "link";
49 reset-names = "link";
55 phy-supply = <&usb_vbus0>;