Lines Matching +full:pinmux +full:- +full:id
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre TORGUE <alexandre.torgue@st.com>
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
25 - st,stm32f769-pinctrl
26 - st,stm32h743-pinctrl
27 - st,stm32mp157-pinctrl
28 - st,stm32mp157-z-pinctrl
30 '#address-cells':
32 '#size-cells':
36 pins-are-numbered: true
44 - Phandle to the syscon node which includes IRQ mux selection.
45 - The offset of the IRQ mux selection register.
46 - The field mask of IRQ mux, needed if different of 0xf.
47 $ref: "/schemas/types.yaml#/definitions/phandle-array"
52 More details in include/dt-bindings/pinctrl/stm32-pinfunc.h
57 '^gpio@[0-9a-f]*$':
60 gpio-controller: true
61 '#gpio-cells':
71 gpio-ranges:
80 st,bank-name:
85 - GPIOA
86 - GPIOB
87 - GPIOC
88 - GPIOD
89 - GPIOE
90 - GPIOF
91 - GPIOG
92 - GPIOH
93 - GPIOI
94 - GPIOJ
95 - GPIOK
96 - GPIOZ
98 st,bank-ioport:
107 - gpio-controller
108 - '#gpio-cells'
109 - reg
110 - clocks
111 - st,bank-name
113 '-[0-9]*$':
124 pinmux:
125 $ref: "/schemas/types.yaml#/definitions/uint32-array"
129 defined in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
132 - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
133 - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
134 - function: The function number, can be:
142 To simplify the usage, macro is available to generate "pinmux" field.
144 - include/dt-bindings/pinctrl/stm32-pinfunc.h
148 pinmux = <STM32_PINMUX('A', 9, AF2)>;
152 pinmux = <STM32_PINMUX('A', 9, GPIO)>;
156 pinmux = <STM32_PINMUX('A', 9, ANALOG)>;
159 bias-disable:
161 bias-pull-down:
163 bias-pull-up:
165 drive-push-pull:
167 drive-open-drain:
169 output-low:
171 output-high:
173 slew-rate:
183 - pinmux
186 - compatible
187 - '#address-cells'
188 - '#size-cells'
189 - ranges
190 - pins-are-numbered
195 - |
196 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
197 #include <dt-bindings/mfd/stm32f4-rcc.h>
200 #address-cells = <1>;
201 #size-cells = <1>;
202 compatible = "st,stm32f429-pinctrl";
204 pins-are-numbered;
207 gpio-controller;
208 #gpio-cells = <2>;
212 st,bank-name = "GPIOA";
216 //Example 2 (using gpio-ranges)
218 #address-cells = <1>;
219 #size-cells = <1>;
220 compatible = "st,stm32f429-pinctrl";
222 pins-are-numbered;
225 gpio-controller;
226 #gpio-cells = <2>;
230 st,bank-name = "GPIOB";
231 gpio-ranges = <&pinctrl 0 0 16>;
235 gpio-controller;
236 #gpio-cells = <2>;
240 st,bank-name = "GPIOC";
242 gpio-ranges = <&pinctrl 0 16 3>,
249 usart1_pins_a: usart1-0 {
251 pinmux = <STM32_PINMUX('A', 9, AF7)>;
252 bias-disable;
253 drive-push-pull;
254 slew-rate = <0>;
257 pinmux = <STM32_PINMUX('A', 10, AF7)>;
258 bias-disable;
264 pinctrl-0 = <&usart1_pins_a>;
265 pinctrl-names = "default";