Lines Matching +full:hardware +full:- +full:triggered
3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
6 on-chip controllers onto these pads.
9 - compatible: should be one of the following.
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
16 - "samsung,exynos3250-pinctrl": for Exynos3250 compatible pin-controller.
17 - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
18 - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
19 - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
20 - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller.
21 - "samsung,exynos5410-pinctrl": for Exynos5410 compatible pin-controller.
22 - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
23 - "samsung,exynos5433-pinctrl": for Exynos5433 compatible pin-controller.
24 - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
26 - reg: Base address of the pin controller hardware module and length of
29 - reg: Second base address of the pin controller if the specific registers
32 Eg: GPF[1-5] of Exynos5433 are separated into the two base address.
33 - First base address is for GPAx and GPF[1-5] external interrupt
35 - Second base address is for GPF[1-5] pinctrl registers.
38 compatible = "samsung,exynos5433-pinctrl";
41 wakeup-interrupt-controller {
42 compatible = "samsung,exynos7-wakeup-eint";
47 - Pin banks as child nodes: Pin banks of the controller are represented by child
51 - gpio-controller: identifies the node as a gpio controller and pin bank.
52 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
62 - Pin number: is a value between 0 to 7.
63 - Flags: 0 - Active High
64 1 - Active Low
66 - Pin mux/config groups as child nodes: The pin mux (selecting pin function
68 as child nodes of the pin-controller node. There should be at least one
80 using pin names which are derived from the hardware manual of the SoC. As
82 as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
83 The format of the pin names should be (as per the hardware manual)
84 "[pin bank name]-[pin number within the bank]".
87 child node is specified using the "samsung,pin-function" property. The value
89 "samsung,pins" property should be picked from the hardware manual of the SoC
92 node. The value of this property is used as-is to program the pin-controller
93 function selector register of the pin-bank.
100 - samsung,pin-val: Initial value of pin output buffer.
101 - samsung,pin-pud: Pull up/down configuration.
102 - samsung,pin-drv: Drive strength configuration.
103 - samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
104 - samsung,pin-drv-pdn: Drive strength configuration in power down mode.
107 hardware manual and these values are programmed as-is into the pin
108 pull up/down and driver strength register of the pin-controller.
114 pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
125 following properties should be specified in the pin-controller device node.
127 - interrupts: interrupt specifier for the controller. The format and value of
133 - interrupt-controller: identifies the controller node as interrupt-parent.
134 - #interrupt-cells: the value of this property should be 2.
135 - First Cell: represents the external gpio interrupt number local to the
137 - Second Cell: flags to identify the type of the interrupt
138 - 1 = rising edge triggered
139 - 2 = falling edge triggered
140 - 3 = rising and falling edge triggered
141 - 4 = high level triggered
142 - 8 = low level triggered
146 included in the pin-controller device node.
148 Only one pin-controller device node can include external wakeup interrupts
150 pin-controller is supported).
154 - compatible: identifies the type of the external wakeup interrupt controller
156 - samsung,s3c2410-wakeup-eint: represents wakeup interrupt controller
158 - samsung,s3c2412-wakeup-eint: represents wakeup interrupt controller
160 - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller
162 - samsung,s5pv210-wakeup-eint: represents wakeup interrupt controller
164 - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
166 - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller
168 - interrupts: interrupt used by multiplexed wakeup interrupts.
171 of pins supporting wake-up interrupts:
173 - interrupt-controller: identifies the node as interrupt-parent.
174 - #interrupt-cells: the value of this property should be 2
175 - First Cell: represents the external wakeup interrupt number local to
177 - Second Cell: flags to identify the type of the interrupt
178 - 1 = rising edge triggered
179 - 2 = falling edge triggered
180 - 3 = rising and falling edge triggered
181 - 4 = high level triggered
182 - 8 = low level triggered
184 Node of every bank of pins supporting direct wake-up interrupts (without
187 - interrupts: interrupts of the interrupt parent which are used for external
196 Aliases for controllers compatible with "samsung,exynos7-pinctrl":
197 - pinctrl0: pin controller of ALIVE block,
198 - pinctrl1: pin controller of BUS0 block,
199 - pinctrl2: pin controller of NFC block,
200 - pinctrl3: pin controller of TOUCH block,
201 - pinctrl4: pin controller of FF block,
202 - pinctrl5: pin controller of ESE block,
203 - pinctrl6: pin controller of FSYS0 block,
204 - pinctrl7: pin controller of FSYS1 block,
205 - pinctrl8: pin controller of BUS1 block,
206 - pinctrl9: pin controller of AUDIO block,
208 Example: A pin-controller node with pin banks:
211 compatible = "samsung,exynos4210-pinctrl";
219 gpio-controller;
220 #gpio-cells = <2>;
225 /* Pin bank with external GPIO or muxed wake-up interrupts */
227 gpio-controller;
228 #gpio-cells = <2>;
230 interrupt-controller;
231 #interrupt-cells = <2>;
236 /* Pin bank with external direct wake-up interrupts */
238 gpio-controller;
239 #gpio-cells = <2>;
241 interrupt-controller;
242 interrupt-parent = <&gic>;
245 #interrupt-cells = <2>;
251 Example 1: A pin-controller node with pin groups.
253 #include <dt-bindings/pinctrl/samsung.h>
256 compatible = "samsung,exynos4210-pinctrl";
262 uart0_data: uart0-data {
263 samsung,pins = "gpa0-0", "gpa0-1";
264 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
265 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
266 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
269 uart0_fctl: uart0-fctl {
270 samsung,pins = "gpa0-2", "gpa0-3";
271 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
272 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
273 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
276 uart1_data: uart1-data {
277 samsung,pins = "gpa0-4", "gpa0-5";
278 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
279 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
280 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
283 uart1_fctl: uart1-fctl {
284 samsung,pins = "gpa0-6", "gpa0-7";
285 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
286 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
287 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
290 i2c2_bus: i2c2-bus {
291 samsung,pins = "gpa0-6", "gpa0-7";
292 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
293 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
294 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
297 sd4_bus8: sd4-bus-width8 {
298 part-1 {
299 samsung,pins = "gpk0-3", "gpk0-4",
300 "gpk0-5", "gpk0-6";
301 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
302 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
303 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
305 part-2 {
306 samsung,pins = "gpk1-3", "gpk1-4",
307 "gpk1-5", "gpk1-6";
308 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
309 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
310 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
315 Example 2: A pin-controller node with external wakeup interrupt controller node.
318 compatible = "samsung,exynos4210-pinctrl";
324 wakeup-interrupt-controller {
325 compatible = "samsung,exynos4210-wakeup-eint";
326 interrupt-parent = <&gic>;
331 Example 3: A uart client node that supports 'default' and 'flow-control' states.
334 compatible = "samsung,exynos4210-uart";
337 pinctrl-names = "default", "flow-control;
338 pinctrl-0 = <&uart0_data>;
339 pinctrl-1 = <&uart0_data &uart0_fctl>;
349 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
355 display-port-controller {
358 samsung,hpd-gpio = <&gpx2 6 0>;
359 pinctrl-names = "default";
360 pinctrl-0 = <&dp_hpd>;
368 struct device *dev = &pdev->dev;
369 struct device_node *dp_node = dev->of_node;
373 hpd_gpio = of_get_named_gpio(dp_node, "samsung,hpd-gpio", 0);
377 ret = devm_gpio_request_one(&pdev->dev, hpd_gpio, GPIOF_IN,