Lines Matching +full:pinmux +full:- +full:id
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzn1-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gareth Williams <gareth.williams.jx@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 - enum:
17 - renesas,r9a06g032-pinctrl # RZ/N1D
18 - renesas,r9a06g033-pinctrl # RZ/N1S
19 - const: renesas,rzn1-pinctrl # Generic RZ/N1
23 - description: GPIO Multiplexing Level1 Register Block
24 - description: GPIO Multiplexing Level2 Register Block
29 clock-names:
35 - compatible
36 - reg
37 - clocks
38 - clock-names
42 - type: object
44 - $ref: pincfg-node.yaml#
45 - $ref: pinmux-node.yaml#
48 A pin multiplexing sub-node describes how to configure a set of (or a
50 A single sub-node may define several pin configurations.
53 pinmux:
62 same argument list of a single "pinmux" property.
63 Integers values in the "pinmux" argument list are assembled as:
67 <include/dt-bindings/pinctrl/rzn1-pinctrl.h>
75 bias-disable: true
76 bias-pull-up:
78 bias-pull-down:
80 bias-high-impedance: true
81 drive-strength:
85 - pinmux
90 - type: object
98 - |
99 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
100 #include <dt-bindings/pinctrl/rzn1-pinctrl.h>
102 compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";
105 clock-names = "bus";
112 pinmux = <
119 * Set the pull-up on the RXD pin of the UART.
122 pinmux = <RZN1_PINMUX(103, RZN1_FUNC_UART0_I)>;
125 pinmux = <RZN1_PINMUX(104, RZN1_FUNC_UART0_I)>;
126 bias-pull-up;