Lines Matching +full:led +full:- +full:8
4 - compatible: Should be one of the following
5 "mediatek,mt7622-pinctrl" for MT7622 SoC
6 "mediatek,mt7629-pinctrl" for MT7629 SoC
7 - reg: offset and length of the pinctrl space
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells: Should be two. The first cell is the pin number and the
14 - interrupt-controller : Marks the device node as an interrupt controller
16 If the property interrupt-controller is defined, following property is required
17 - reg-names: A string describing the "reg" entries. Must contain "eint".
18 - interrupts : The interrupt output from the controller.
19 - #interrupt-cells: Should be two.
21 Please refer to pinctrl-bindings.txt in this directory for details of the
29 parameters, such as pull-up, slew rate, etc.
40 The following generic properties as defined in pinctrl-bindings.txt are valid
44 - groups: An array of strings. Each string contains the name of a group.
46 - function: A string containing the name of the function to mux to the
51 The following generic properties as defined in pinctrl-bindings.txt are valid
55 - pins: An array of strings. Each string contains the name of a pin.
57 - groups: An array of strings. Each string contains the name of a group.
61 bias-disable, bias-pull, bias-pull-down, input-enable,
62 input-schmitt-enable, input-schmitt-disable, output-enable
63 output-low, output-high, drive-strength, slew-rate
65 Valid arguments for 'slew-rate' are '0' for no slew rate controlled and '1' for
67 Valid arguments for 'drive-strength', 4, 8, 12, or 16 in mA.
73 - mediatek,tdsel: An integer describing the steps for output level shifter duty
76 - mediatek,rdsel: An integer describing the steps for input level shifter duty
89 -----------------------------
98 PIN 8: "SPI_WP"
195 "emmc", "eth", "i2c", "i2s", "ir", "led", "flash", "pcie",
204 -------------------------------------------------------------------------
246 "ephy_leds" "led" 86, 91, 92, 93, 94
247 "ephy0_led" "led" 86
248 "ephy1_led" "led" 91
249 "ephy2_led" "led" 92
250 "ephy3_led" "led" 93
251 "ephy4_led" "led" 94
252 "wled" "led" 85
256 "snfi" "flash" 8, 9, 10, 11, 12, 13
257 "spi_nor" "flash" 8, 9, 10, 11, 12, 13
296 "spic2_0_wp_hold" "spi" 8, 9
298 "tdm_0_out_mclk_bclk_ws" "tdm" 8, 9, 10
332 -----------------------------
341 PIN 8: "WF0_5G_HB6"
414 "eth", "i2c", "led", "flash", "pcie", "pwm", "spi", "uart",
419 ----------------------------------------------------------------
423 "ephy_leds" "led" 12, 13, 14, 15, 16,
425 "ephy0_led" "led" 12
426 "ephy1_led" "led" 13
427 "ephy2_led" "led" 14
428 "ephy3_led" "led" 15
429 "ephy4_led" "led" 16
430 "wf2g_led" "led" 17
431 "wf5g_led" "led" 18
456 7, 8, 9, 10
461 compatible = "mediatek,mt7622-pinctrl";
463 gpio-controller;
464 #gpio-cells = <2>;
466 pinctrl_eth_default: eth-default {
467 mux-mdio {
470 drive-strength = <12>;
473 mux-gmac2 {
476 drive-strength = <12>;
479 mux-esw {
482 drive-strength = <8>;
485 conf-mdio {
487 bias-pull-up;