Lines Matching full:pmu
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
14 Note: pmu* also allows for Power Management functions listed below
18 mpp0 0 gpio, pmu, uart2(rts), sdio0(cd), lcd0(pwm), pmu*
19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu*
20 mpp2 2 gpio, pmu, uart2(txd), sdio0(buspwr), sata(prsnt),
21 uart1(rts), pmu*
22 mpp3 3 gpio, pmu, uart2(rxd), sdio0(ledctrl), sata(act),
23 uart1(cts), lcd-spi(cs1), pmu*
24 mpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso), pmu*
25 mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu*
26 mpp6 6 gpio, pmu, uart3(txd), sdio1(buspwr), spi1(mosi), pmu*
27 mpp7 7 gpio, pmu, uart3(rxd), sdio1(ledctrl), spi1(sck), pmu*
28 mpp8 8 gpio, pmu, watchdog(rstout), pmu*
29 mpp9 9 gpio, pmu, pex1(clkreq), pmu*
30 mpp10 10 gpio, pmu, ssp(sclk), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
32 sdio1(ledctrl), pex0(clkreq), pmu*
33 mpp12 12 gpio, pmu, uart2(rts), audio0(extclk), sdio1(cd),
34 sata(act), pmu*
35 mpp13 13 gpio, pmu, uart2(cts), audio1(extclk), sdio1(wp),
36 ssp(extclk), pmu*
37 mpp14 14 gpio, pmu, uart2(txd), sdio1(buspwr), ssp(rxd), pmu*
38 mpp15 15 gpio, pmu, uart2(rxd), sdio1(ledctrl), ssp(sfrm), pmu*
63 Power Management functions (pmu*):
64 pmu-nc Pin not driven by any PM function
65 pmu-low Pin driven low (0)
66 pmu-high Pin driven high (1)
76 pmu-blink Pin is used for blink function