Lines Matching +full:sel +full:- +full:gpios

3 iMX7D supports two iomuxc controllers, fsl,imx7d-iomuxc controller is similar
4 as previous iMX SoC generation and fsl,imx7d-iomuxc-lpsr which provides low
5 power state retention capabilities on gpios that are part of iomuxc-lpsr
6 (GPIO1_IO7..GPIO1_IO0). While iomuxc-lpsr provides its own set of registers for
8 iomuxc controller for daisy chain settings, the fsl,input-sel property extends
9 fsl,imx-pinctrl driver to support iomuxc-lpsr controller.
11 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
12 	compatible = "fsl,imx7d-iomuxc-lpsr";
14 	fsl,input-sel = <&iomuxc>;
18 	compatible = "fsl,imx7d-iomuxc";
22 Peripherals using pads from iomuxc-lpsr support low state retention power
25 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
29 - compatible: "fsl,imx7d-iomuxc" for main IOMUXC controller, or
30   "fsl,imx7d-iomuxc-lpsr" for Low Power State Retention IOMUXC controller.
31 - fsl,pins: each entry consists of 6 integers and represents the mux and config
34   imx7d-pinfunc.h under device tree source folder.  The last integer CONFIG is
35   the pad setting value like pull-up on this pin.  Please refer to i.MX7 Dual
37 - fsl,input-sel: required property for iomuxc-lpsr controller, this property is
56 While iomuxc-lpsr is intended to be used by dedicated peripherals to take
59 iomuxc-lpsr controller and SDA pad from iomuxc controller as:
62 	pinctrl-names = "default";
63 	pinctrl-0 = <&pinctrl_i2c1_1 &pinctrl_i2c1_2>;
66 iomuxc-lpsr@302c0000 {
67 	compatible = "fsl,imx7d-iomuxc-lpsr";
69 	fsl,input-sel = <&iomuxc>;
71 	pinctrl_i2c1_1: i2c1grp-1 {
79 	compatible = "fsl,imx7d-iomuxc";
82 	pinctrl_i2c1_2: i2c1grp-2 {