Lines Matching +full:phy +full:- +full:names

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A80 USB PHY Device Tree Bindings
10   - Chen-Yu Tsai <wens@csie.org>
11   - Maxime Ripard <mripard@kernel.org>
14   "#phy-cells":
18     const: allwinner,sun9i-a80-usb-phy
25       - description: Main PHY Clock
27       - items:
28           - description: Main PHY clock
29           - description: HSIC 12MHz clock
30           - description: HSIC 480MHz clock
32   clock-names:
34       - const: phy
36       - items:
37           - const: phy
38           - const: hsic_12M
39           - const: hsic_480M
43       - description: Normal USB PHY reset
45       - items:
46           - description: Normal USB PHY reset
47           - description: HSIC Reset
49   reset-names:
51       - const: phy
53       - items:
54           - const: phy
55           - const: hsic
60       When absent, the PHY type will be assumed to be normal USB.
62   phy-supply:
67   - "#phy-cells"
68   - compatible
69   - reg
70   - clocks
71   - clock-names
72   - resets
73   - reset-names
83     - phy_type
90     clock-names:
96     reset-names:
100   - |
101     #include <dt-bindings/clock/sun9i-a80-usb.h>
102     #include <dt-bindings/reset/sun9i-a80-usb.h>
104     usbphy1: phy@a00800 {
105         compatible = "allwinner,sun9i-a80-usb-phy";
108         clock-names = "phy";
110         reset-names = "phy";
111         phy-supply = <&reg_usb1_vbus>;
112         #phy-cells = <0>;
115   - |
116     #include <dt-bindings/clock/sun9i-a80-usb.h>
117     #include <dt-bindings/reset/sun9i-a80-usb.h>
119     usbphy3: phy@a02800 {
120         compatible = "allwinner,sun9i-a80-usb-phy";
125         clock-names = "phy",
130         reset-names = "phy",
133         phy-supply = <&reg_usb3_vbus>;
134         #phy-cells = <0>;