Lines Matching +full:designware +full:- +full:pcie

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/socionext,uniphier-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier PCIe endpoint controller
10   UniPhier PCIe endpoint controller is based on the Synopsys DesignWare
11   PCI core. It shares common features with the PCIe DesignWare core and
13   Documentation/devicetree/bindings/pci/designware-pcie.txt.
16   - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
19   - $ref: "pci-ep.yaml#"
23     const: socionext,uniphier-pro5-pcie-ep
29   reg-names:
31       - items:
32           - const: dbi
33           - const: dbi2
34           - const: link
35           - const: addr_space
36       - items:
37           - const: dbi
38           - const: dbi2
39           - const: link
40           - const: addr_space
41           - const: atu
46   clock-names:
48       - const: gio
49       - const: link
54   reset-names:
56       - const: gio
57       - const: link
59   num-ib-windows:
62   num-ob-windows:
65   num-lanes: true
70   phy-names:
71     const: pcie-phy
74   - compatible
75   - reg
76   - reg-names
77   - clocks
78   - clock-names
79   - resets
80   - reset-names
85   - |
86     pcie_ep: pcie-ep@66000000 {
87         compatible = "socionext,uniphier-pro5-pcie-ep";
88         reg-names = "dbi", "dbi2", "link", "addr_space";
91         clock-names = "gio", "link";
93         reset-names = "gio", "link";
95         num-ib-windows = <16>;
96         num-ob-windows = <16>;
97         num-lanes = <4>;
98         phy-names = "pcie-phy";