Lines Matching +full:kirin +full:- +full:based

1 HiSilicon Kirin SoCs PCIe host DT description
3 Kirin PCIe host controller is based on the Synopsys DesignWare PCI core.
6 Documentation/devicetree/bindings/pci/designware-pcie.txt.
11 - compatible:
12 	"hisilicon,kirin960-pcie" for PCIe of Kirin960 SoC
13 - reg: Should contain rc_dbi, apb, phy, config registers location and length.
14 - reg-names: Must include the following entries:
16   "apb": apb Ctrl register defined by Kirin;
17   "phy": apb PHY register defined by Kirin;
19 - reset-gpios: The GPIO to generate PCIe PERST# assert and deassert signal.
23 Example based on kirin960:
26 		compatible = "hisilicon,kirin-pcie";
29 		reg-names = "dbi","apb","phy", "config";
30 		bus-range = <0x0  0x1>;
31 		#address-cells = <3>;
32 		#size-cells = <2>;
35 		num-lanes = <1>;
36 		#interrupt-cells = <1>;
37 		interrupt-map-mask = <0xf800 0 0 7>;
38 		interrupt-map = <0x0 0 0 1 &gic 0 0 0  282 4>,
47 		clock-names = "pcie_phy_ref", "pcie_aux",
49 		reset-gpios = <&gpio11 1 0 >;