Lines Matching +full:msi +full:- +full:map
4 - compatible : should contain "altr,pcie-root-port-1.0" or "altr,pcie-root-port-2.0"
5 - reg: a list of physical base address and length for TXS and CRA.
6 For "altr,pcie-root-port-2.0", additional HIP base address and length.
7 - reg-names: must include the following entries:
10 "Hip": Hard IP region (if "altr,pcie-root-port-2.0")
11 - interrupts: specifies the interrupt source of the parent interrupt
14 - device_type: must be "pci"
15 - #address-cells: set to <3>
16 - #size-cells: set to <2>
17 - #interrupt-cells: set to <1>
18 - ranges: describes the translation of addresses for root ports and
20 - interrupt-map-mask and interrupt-map: standard PCI properties to define the
24 - msi-parent: Link to the hardware entity that serves as the MSI controller
26 - bus-range: PCI bus numbers covered
30 compatible = "altr,pcie-root-port-1.0";
33 reg-names = "Txs", "Cra";
34 interrupt-parent = <&hps_0_arm_gic_0>;
36 interrupt-controller;
37 #interrupt-cells = <1>;
38 bus-range = <0x0 0xFF>;
40 msi-parent = <&msi_to_gic_gen_0>;
41 #address-cells = <3>;
42 #size-cells = <2>;
43 interrupt-map-mask = <0 0 0 7>;
44 interrupt-map = <0 0 0 1 &pcie_0 1>,