Lines Matching +full:syscon +full:- +full:efuse
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
10 - Anson Huang <Anson.Huang@nxp.com>
13 This binding represents the on-chip eFuse OTP controller found on
18 - $ref: "nvmem.yaml#"
23 - items:
24 - enum:
25 - fsl,imx6q-ocotp
26 - fsl,imx6sl-ocotp
27 - fsl,imx6sx-ocotp
28 - fsl,imx6ul-ocotp
29 - fsl,imx6ull-ocotp
30 - fsl,imx7d-ocotp
31 - fsl,imx6sll-ocotp
32 - fsl,imx7ulp-ocotp
33 - fsl,imx8mq-ocotp
34 - fsl,imx8mm-ocotp
35 - const: syscon
36 - items:
37 - enum:
38 - fsl,imx8mn-ocotp
39 # i.MX8MP not really compatible with fsl,imx8mm-ocotp, however
40 # the code for getting SoC revision depends on fsl,imx8mm-ocotp
42 - fsl,imx8mp-ocotp
43 - const: fsl,imx8mm-ocotp
44 - const: syscon
49 "#address-cells":
52 "#size-cells":
59 - "#address-cells"
60 - "#size-cells"
61 - compatible
62 - reg
65 "^.*@[0-9a-f]+$":
75 - reg
82 - |
83 #include <dt-bindings/clock/imx6sx-clock.h>
85 ocotp: efuse@21bc000 {
86 #address-cells = <1>;
87 #size-cells = <1>;
88 compatible = "fsl,imx6sx-ocotp", "syscon";
92 cpu_speed_grade: speed-grade@10 {
100 tempmon_temp_grade: temp-grade@20 {