Lines Matching +full:0 +full:x46000000
22 an internal Communications Port Programming Interface (CPPI5) (Host port 0).
23 Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels
30 Support for Audio/Video Bridging (P802.1Qav/D6.0)
34 IEEE P902.3br/D2.0 Interspersing Express Traffic
99 const: 0
139 "^mdio@[0-9a-f]+$":
146 "^cpts@[0-9a-f]+":
183 reg = <0x0 0x46000000 0x0 0x200000>;
185 ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
191 pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
193 dmas = <&mcu_udmap 0xf000>,
194 <&mcu_udmap 0xf001>,
195 <&mcu_udmap 0xf002>,
196 <&mcu_udmap 0xf003>,
197 <&mcu_udmap 0xf004>,
198 <&mcu_udmap 0xf005>,
199 <&mcu_udmap 0xf006>,
200 <&mcu_udmap 0xf007>,
201 <&mcu_udmap 0x7000>;
207 #size-cells = <0>;
213 ti,syscon-efuse = <&mcu_conf 0x200>;
223 reg = <0x0 0xf00 0x0 0x100>;
225 #size-cells = <0>;
230 phy0: ethernet-phy@0 {
231 reg = <0>;
240 reg = <0x0 0x3d000 0x0 0x400>;