Lines Matching +full:reset +full:- +full:assert +full:- +full:us
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
24 "#address-cells":
27 "#size-cells":
30 reset-gpios:
33 The phandle and specifier for the GPIO that controls the RESET
36 reset-delay-us:
38 RESET pulse width in microseconds. It applies to all MDIO devices
40 requirements (maximum value of all per-device RESET pulse widths).
42 reset-post-delay-us:
44 Delay after reset deassert in microseconds. It applies to all MDIO
49 clock-frequency:
55 suppress-preamble:
62 "^ethernet-phy@[0-9a-f]+$":
72 broken-turn-around:
82 reset-names:
85 reset-gpios:
88 The GPIO phandle and specifier for the MDIO reset signal.
90 reset-assert-us:
92 Delay after the reset was asserted in microseconds. If this
95 reset-deassert-us:
97 Delay after the reset was deasserted in microseconds. If
101 - reg
106 - |
109 #address-cells = <1>;
110 #size-cells = <0>;
112 reset-gpios = <&gpio2 5 1>;
113 reset-delay-us = <2>;
115 ethphy0: ethernet-phy@1 {
119 ethphy1: ethernet-phy@3 {