Lines Matching +full:0 +full:- +full:3

8 - #address-cells = <1>;
9 - #size-cells = <0>;
12 - mdio-parent-bus : phandle to the parent MDIO bus.
14 - Other properties specific to the multiplexer/switch hardware.
17 - #address-cells = <1>;
18 - #size-cells = <0>;
19 - reg : The sub-bus number.
26 		compatible = "cavium,octeon-3860-mdio";
27 		#address-cells = <1>;
28 		#size-cells = <0>;
29 		reg = <0x11800 0x00001900 0x0 0x40>;
33 	   An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a
34 	   pair of GPIO lines.  Child busses 2 and 3 populated with 4
37 	mdio-mux {
38 		compatible = "mdio-mux-gpio";
39 		gpios = <&gpio1 3 0>, <&gpio1 4 0>;
40 		mdio-parent-bus = <&smi1>;
41 		#address-cells = <1>;
42 		#size-cells = <0>;
46 			#address-cells = <1>;
47 			#size-cells = <0>;
49 			phy11: ethernet-phy@1 {
51 				marvell,reg-init = <3 0x10 0 0x5777>,
52 					<3 0x11 0 0x00aa>,
53 					<3 0x12 0 0x4105>,
54 					<3 0x13 0 0x0a60>;
55 				interrupt-parent = <&gpio>;
58 			phy12: ethernet-phy@2 {
60 				marvell,reg-init = <3 0x10 0 0x5777>,
61 					<3 0x11 0 0x00aa>,
62 					<3 0x12 0 0x4105>,
63 					<3 0x13 0 0x0a60>;
64 				interrupt-parent = <&gpio>;
67 			phy13: ethernet-phy@3 {
68 				reg = <3>;
69 				marvell,reg-init = <3 0x10 0 0x5777>,
70 					<3 0x11 0 0x00aa>,
71 					<3 0x12 0 0x4105>,
72 					<3 0x13 0 0x0a60>;
73 				interrupt-parent = <&gpio>;
76 			phy14: ethernet-phy@4 {
78 				marvell,reg-init = <3 0x10 0 0x5777>,
79 					<3 0x11 0 0x00aa>,
80 					<3 0x12 0 0x4105>,
81 					<3 0x13 0 0x0a60>;
82 				interrupt-parent = <&gpio>;
87 		mdio@3 {
88 			reg = <3>;
89 			#address-cells = <1>;
90 			#size-cells = <0>;
92 			phy21: ethernet-phy@1 {
94 				marvell,reg-init = <3 0x10 0 0x5777>,
95 					<3 0x11 0 0x00aa>,
96 					<3 0x12 0 0x4105>,
97 					<3 0x13 0 0x0a60>;
98 				interrupt-parent = <&gpio>;
101 			phy22: ethernet-phy@2 {
103 				marvell,reg-init = <3 0x10 0 0x5777>,
104 					<3 0x11 0 0x00aa>,
105 					<3 0x12 0 0x4105>,
106 					<3 0x13 0 0x0a60>;
107 				interrupt-parent = <&gpio>;
110 			phy23: ethernet-phy@3 {
111 				reg = <3>;
112 				marvell,reg-init = <3 0x10 0 0x5777>,
113 					<3 0x11 0 0x00aa>,
114 					<3 0x12 0 0x4105>,
115 					<3 0x13 0 0x0a60>;
116 				interrupt-parent = <&gpio>;
119 			phy24: ethernet-phy@4 {
121 				marvell,reg-init = <3 0x10 0 0x5777>,
122 					<3 0x11 0 0x00aa>,
123 					<3 0x12 0 0x4105>,
124 					<3 0x13 0 0x0a60>;
125 				interrupt-parent = <&gpio>;