Lines Matching +full:delay +full:- +full:us

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Andrew Lunn <andrew@lunn.ch>
11   - Florian Fainelli <f.fainelli@gmail.com>
12   - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21       pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24     - $nodename
28     pattern: "^ethernet-phy(@[a-f0-9]+)?$"
32       - const: ethernet-phy-ieee802.3-c22
34       - const: ethernet-phy-ieee802.3-c45
36       - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
46       - items:
47           - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
48           - const: ethernet-phy-ieee802.3-c22
49       - items:
50           - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
51           - const: ethernet-phy-ieee802.3-c45
62   max-speed:
64       - 10
65       - 100
66       - 1000
67       - 2500
68       - 5000
69       - 10000
70       - 20000
71       - 25000
72       - 40000
73       - 50000
74       - 56000
75       - 100000
76       - 200000
80   broken-turn-around:
87   enet-phy-lane-swap:
94   eee-broken-100tx:
100   eee-broken-1000t:
106   eee-broken-10gt:
112   eee-broken-1000kx:
118   eee-broken-10gkx4:
124   eee-broken-10gkr:
130   phy-is-integrated:
142   reset-names:
145   reset-gpios:
150   reset-assert-us:
152       Delay after the reset was asserted in microseconds. If this
153       property is missing the delay will be skipped.
155   reset-deassert-us:
157       Delay after the reset was deasserted in microseconds. If
158       this property is missing the delay will be skipped.
165   rx-internal-delay-ps:
167       RGMII Receive PHY Clock Delay defined in pico seconds.  This is used for
169       present then the PHY applies the RX delay.
171   tx-internal-delay-ps:
173       RGMII Transmit PHY Clock Delay defined in pico seconds.  This is used for
175       present then the PHY applies the TX delay.
178   - reg
183   - |
185         #address-cells = <1>;
186         #size-cells = <0>;
188         ethernet-phy@0 {
189             compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c45";
190             interrupt-parent = <&PIC>;
195             reset-names = "phy";
196             reset-gpios = <&gpio1 4 1>;
197             reset-assert-us = <1000>;
198             reset-deassert-us = <2000>;