Lines Matching +full:rx +full:- +full:delay +full:- +full:ps

1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Alexandru Ardelean <alexandru.ardelean@analog.com>
16   - $ref: ethernet-phy.yaml#
19   adi,rx-internal-delay-ps:
21       RGMII RX Clock Delay used only when PHY operates in RGMII mode with
22       internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
26   adi,tx-internal-delay-ps:
28       RGMII TX Clock Delay used only when PHY operates in RGMII mode with
29       internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
33   adi,fifo-depth-bits:
42   - |
44         #address-cells = <1>;
45         #size-cells = <0>;
47         phy-mode = "rgmii-id";
49         ethernet-phy@0 {
52             adi,rx-internal-delay-ps = <1800>;
53             adi,tx-internal-delay-ps = <2200>;
56   - |
58         #address-cells = <1>;
59         #size-cells = <0>;
61         phy-mode = "rmii";
63         ethernet-phy@1 {
66             adi,fifo-depth-bits = <16>;