Lines Matching +full:0 +full:x54
30 reg = <0x66>;
35 mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
36 <0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
43 mux-controls = <&mux 0>;
46 #size-cells = <0>;
48 mdio@0 {
49 reg = <0x0>;
51 #size-cells = <0>;
55 reg = <0x8>;
57 #size-cells = <0>;
69 #size-cells = <0>;
71 mdio@0 {
72 reg = <0x0>;
74 #size-cells = <0>;
78 reg = <0x1>;
80 #size-cells = <0>;
97 mux-reg-masks = <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */
98 <0x3 0x40>, /* 1: reg 0x3, bit 6 */
99 idle-states = <MUX_IDLE_AS_IS>, <0>;
105 mux-controls = <&mux 0>;
107 #size-cells = <0>;
110 /* inputs 0..3 */
111 port@0 {
112 reg = <0>;